P
R
E
L
I M
I N
A
R
Y
D A
T
A
S
H E
E
T
XpressFlow-2001 Series –
Ethernet Switch Chip-set
EA-224
4-Port 10/100M Ethernet Access Controller
3. PIN ASSIGNMENT
3.1 Logic Symbol
EA-224
Control Buffer
Memory Interface
L_D[31:0]
L_A[18:2]
L_BWE[3:0]#
L_WE[3:0]#
L_OE[3:0]#
L_ADSC#
L_CLK
P_D[15:0]
P_A[11:1]
P_CS#
P_ADS#
P_RWC
P_BS16#
P_RDY#
P_INT
P_RST#
P_CLK
S_D[31:0]
S_MSGEN#
S_EOF#
S_IRDY
S_TABT#
S_OVLD#
S_HPREQ#
S_REQ#
S_GNT#
S_CLK
4
4
4
Test Pin
T_MODE
Management Bus
Interface
4
MII Mode
10BaseT
Serial Xface
Port [3:0]
10/100 MII Interface
Mm_RXD[3:0] Tm_RXD
Mm_RXDV
Mm_RXC
Tm_RXC
Mm_RXER
Mm_TXER
Mm_TXC
Mm_TXEN
Mm_TXD[0]
Mm_TXD[1]
Mm_TXD[2]
Mm_TXD[3]
Mm_COL
Mm_CRS
Mm_LNK
Tm_TXC
Tm_TXEN
Tm_TXD
Tm_LPBK
Tm_FD
Tm_COL
Tm_CRS
Tm_LNK
XpressFlow
Bus Interface
MII Serial
Managem't
M_MDC
M_MDIO
© 1997 Zarlink Semiconductor Inc.
Page: 3
Rev. 4.0 –December, 1997
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
