Data Sheet
October 2002
L8583D Line Card Access Switch
Temperature Shutdown Mechanism
When the device temperature reaches a minimum of
110 °C, the thermal shutdown mechanism will activate
and force the device into an all-off state, regardless of
the logic input pins. Pin T
SD
, when used as an output,
will read 0 V when the device is in the thermal shut-
down mode and +V
DD
during normal operation.
During a lightning event, due to the relatively short
duration, the thermal shutdown will not typically acti-
vate.
During an extended power cross, the device tempera-
ture will rise and cause the device to enter the thermal
shutdown mode. This forces an all-off mode, and the
current seen at T
BAT
/R
BAT
drops to zero. Once in the
thermal shutdown mode, the device will cool and exit
the thermal shutdown mode, thus re-entering the state
it was in prior to thermal shutdown. Current, limited to
the dc current-limit value, will again begin to flow and
device heating will begin again. This cycle of entering
and exiting thermal shutdown will last as long as the
power-cross fault is present. The frequency of entering
and exiting thermal shutdown will depend on the mag-
nitude of the power cross. If the magnitude of the
power cross is great enough, the external secondary
protector may trigger shunting all current to ground.
In the L8583D, the thermal shutdown mechanism can
be disabled by forcing the T
SD
pin to +V
DD
. This func-
tionality is different from the L7581, whose thermal
shutdown mechanism cannot be disabled.
Electrical specifications relating to the integrated over-
voltage clamping circuit are outlined in Table 15.
Protection
Integrated SLIC Protection
Diode Bridge
In the L8583D, protection to the SLIC device or other
subsequent circuitry is provided by a combination of
current-limited break switches, a diode bridge clamping
circuit, and a thermal shutdown mechanism.
During a positive lightning event, fault current is
reduced by the dynamic current-limit circuit and
directed to ground via the diode bridge. Voltage is
clamped to a diode drop above ground. Negative light-
ning is again reduced by the dynamic current limit and
directed to battery via the diode bridge.
For power cross and power induction faults, the posi-
tive cycle of the fault is clamped a diode drop above
ground and fault currents steered to ground and the
negative cycle of the power cross is steered to battery.
Fault currents are limited by the current-limit circuit.
Current Limiting
During a lightning event, the current that is passed
through the break switches and presented to the inte-
grated protection circuit and subsequent circuitry is lim-
ited by the dynamic current-limit response of the break
switches (assuming idle/talk state). When the voltage
seen at the T
LINE
/R
LINE
nodes is properly clamped by
an external secondary protector, upon application of a
1000 V, 10 x 1000 pulse (LSSGR lightning), the current
seen at the T
BAT
/R
BAT
nodes will typically be a pulse of
magnitude 2.5 A and duration less than 0.5 µs.
During a power-cross event, the current that is passed
through the break switches and presented to the inte-
grated protection circuit and subsequent circuitry is lim-
ited by the dc current-limit response of the break
switches (assuming idle/talk state). The dc current limit
is specified over temperature between 80 mA and
250 mA. Note that the current-limit circuitry has a nega-
tive temperature coefficient. Thus, if the device is sub-
jected to an extended power cross, the value of current
seen at T
BAT
/R
BAT
will decrease as the device heats
due to the fault current. If sufficient heating occurs, the
temperature shutdown mechanism will activate and the
device will enter an all-off mode.
13
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
