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XCS40XL-4PQ240C 参数 Datasheet PDF下载

XCS40XL-4PQ240C图片预览
型号: XCS40XL-4PQ240C
PDF下载: 下载PDF文件 查看货源
内容描述: 斯巴达和Spartan-XL系列现场可编程门阵列 [Spartan and Spartan-XL Families Field Programmable Gate Arrays]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 82 页 / 848 K
品牌: XILINX [ XILINX, INC ]
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Spartan and Spartan-XL Families Field Programmable Gate Arrays  
The register choice is made by placing the appropriate  
library symbol. For example, IFD is the basic input flip-flop  
(rising edge triggered), and ILD is the basic input latch  
(transparent-High). Variations with inverted clocks are also  
available. The clock signal inverter is also shown in Figure 5  
on the CK line.  
The 5V Spartan input buffers can be globally configured for  
either TTL (1.2V) or CMOS (VCC/2) thresholds, using an  
option in the bitstream generation software. The Spartan  
output levels are also configurable; the two global adjust-  
ments of input threshold and output level are independent.  
The inputs of Spartan devices can be driven by the outputs  
of any 3.3V device, if the Spartan inputs are in TTL mode.  
Input and output thresholds are TTL on all configuration  
pins until the configuration has been loaded into the device  
and specifies how they are to be used. Spartan-XL inputs  
are TTL compatible and 3.3V CMOS compatible.  
The Spartan IOB data input path has a one-tap delay ele-  
ment: either the delay is inserted (default), or it is not. The  
Spartan-XL IOB data input path has a two-tap delay ele-  
ment, with choices of a full delay, a partial delay, or no delay.  
The added delay guarantees a zero hold time with respect  
to clocks routed through the global clock buffers. (See Glo-  
bal Nets and Buffers, page 12 for a description of the glo-  
bal clock buffers in the Spartan/XL families.) For a shorter  
input register setup time, with positive hold-time, attach a  
NODELAY attribute or property to the flip-flop.The output of  
the input register goes to the routing channels (via I1 and I2  
in Figure 6). The I1 and I2 signals that exit the IOB can each  
carry either the direct or registered input signal.  
Supported sources for Spartan/XL device inputs are shown  
in Table 4.  
Spartan-XL I/Os are fully 5V tolerant even though the V is  
CC  
3.3V. This allows 5V signals to directly connect to the Spar-  
tan-XL inputs without damage, as shown in Table 4. In addi-  
tion, the 3.3V V can be applied before or after 5V signals  
CC  
are applied to the I/Os. This makes the Spartan-XL devices  
immune to power supply sequencing problems.  
GTS  
T
D
Q
O
OUTPUT DRIVER  
Programmable Slew Rate  
Programmable TTL/CMOS Drive  
(Spartan only)  
CK  
EC  
OK  
Package  
Pad  
I1  
I2  
INPUT BUFFER  
Delay  
D
Q
Programmable  
Pull-Up/  
Pull-Down  
Network  
IK  
CK  
EC  
Multiplexer Controlled  
by Configuration Program  
EC  
DS060_06_041901  
Figure 6: Simplified Spartan/XL IOB Block Diagram  
DS060 (v1.6) September 19, 2001  
www.xilinx.com  
7
Product Specification  
1-800-255-7778  
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