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XCS40XL-4PQ240C 参数 Datasheet PDF下载

XCS40XL-4PQ240C图片预览
型号: XCS40XL-4PQ240C
PDF下载: 下载PDF文件 查看货源
内容描述: 斯巴达和Spartan-XL系列现场可编程门阵列 [Spartan and Spartan-XL Families Field Programmable Gate Arrays]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 82 页 / 848 K
品牌: XILINX [ XILINX, INC ]
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R
Spartan and Spartan-XL Families Field Programmable Gate Arrays  
B
G-LUT  
G4  
G3  
G2  
G4  
G3  
G2  
G1  
SR  
Q
D
YQ  
Logic  
Function  
of  
G1-G4  
G
CK  
EC  
G1  
SR  
H-LUT  
Y
G
Logic  
Function  
of  
F-G-H1  
H1  
H
H1  
DIN  
F4  
F
F4  
F3  
F2  
F1  
SR  
A
Q
D
XQ  
Logic  
Function  
of  
F1-F4  
F3  
G
CK  
EC  
F2  
F1  
X
F-LUT  
Multiplexer Controlled  
by Configuration Program  
K
EC  
DS060_02_0506 01  
Figure 2: Spartan/XL Simplified CLB Logic Diagram (some features not shown)  
A CLB can implement any of the following functions:  
Flip-Flops  
Any function of up to four variables, plus any second  
function of up to four unrelated variables, plus any third  
function of up to three unrelated variables  
Each CLB contains two flip-flops that can be used to regis-  
ter (store) the function generator outputs. The flip-flops and  
function generators can also be used independently (see  
Figure 2). The CLB input DIN can be used as a direct input  
to either of the two flip-flops. H1 can also drive either  
flip-flop via the H-LUT with a slight additional delay.  
Note: When three separate functions are generated, one of  
the function outputs must be captured in a flip-flop internal to  
the CLB. Only two unregistered function generator outputs  
are available from the CLB.  
The two flip-flops have common clock (CK), clock enable  
(EC) and set/reset (SR) inputs. Internally both flip-flops are  
also controlled by a global initialization signal (GSR) which  
is described in detail in Global Signals: GSR and GTS,  
page 20.  
Any single function of five variables  
Any function of four variables together with some  
functions of six variables  
Some functions of up to nine variables.  
Implementing wide functions in a single block reduces both  
the number of blocks required and the delay in the signal  
path, achieving both increased capacity and speed.  
Latches (Spartan-XL only)  
The Spartan-XL CLB storage elements can also be config-  
ured as latches. The two latches have common clock (K)  
and clock enable (EC) inputs. Functionality of the storage  
element is described in Table 2.  
The versatility of the CLB function generators significantly  
improves system speed. In addition, the design-software  
tools can deal with each function generator independently.  
This flexibility improves cell usage.  
4
www.xilinx.com  
1-800-255-7778  
DS060 (v1.6) September 19, 2001  
Product Specification  
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