R
Spartan and Spartan-XL Families Field Programmable Gate Arrays
Spartan-XL IOB Output Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Internal timing parameters are
derived from measuring internal test patterns. Listed below
are representative values. For more specific, more precise,
and worst-case guaranteed data, use the values reported
by the static timing analyzer (TRCE in the Xilinx Develop-
ment System) and back-annotated to the simulation netlist.
These path delays, provided as a guideline, have been
extracted from the static timing analyzer report. All timing
parameters assume worst-case operating conditions (sup-
ply voltage and junction temperature). Values are
expressed in nanoseconds unless otherwise noted.
Speed Grade
-5
-4
Symbol
Description
Device
Min
Max
Min
Max
Units
Propagation Delays
T
Clock (OK) to Pad, fast
All devices
All devices
All devices
All devices
All devices
All devices
All devices
-
-
-
-
-
-
-
3.2
2.5
2.8
2.6
3.7
3.3
1.5
-
-
-
-
-
-
-
3.7
2.9
3.3
3.0
4.4
3.9
1.7
ns
ns
ns
ns
ns
ns
ns
OKPOF
T
Output (O) to Pad, fast
OPF
T
3-state to Pad High-Z (slew-rate independent)
3-state to Pad active and valid, fast
Output (O) to Pad via Output Mux, fast
Select (OK) to Pad via Output Mux, fast
For Output SLOW option add
TSHZ
T
TSONF
T
OFPF
T
OKFPF
T
SLOW
Setup and Hold Times
T
Output (O) to clock (OK) setup time
Output (O) to clock (OK) hold time
All devices
All devices
All devices
All devices
0.5
0.0
0.0
0.1
-
-
-
-
0.5
0.0
0.0
0.2
-
-
-
-
ns
ns
ns
ns
OOK
T
OKO
T
T
Clock Enable (EC) to clock (OK) setup time
Clock Enable (EC) to clock (OK) hold time
ECOK
OKEC
Global Set/Reset
T
Minimum GSR pulse width
All devices
XCS05XL
XCS10XL
XCS20XL
XCS30XL
XCS40XL
10.5
-
11.5
-
ns
ns
ns
ns
ns
ns
MRW
T
Delay from GSR input to any Pad
-
-
-
-
-
11.9
12.4
12.9
13.9
14.9
-
-
-
-
-
14.0
14.5
15.0
16.0
17.0
RPO
Notes:
1. Output timing is measured at ~50% V threshold, with 50 pF external capacitive loads including test fixture. Slew-rate limited output
CC
rise/fall times are approximately two times longer than fast output rise/fall times.
2. Voltage levels of unused pads, bonded or unbonded, must be valid logic levels. Each can be configured with the internal pull-up
(default) or pull-down resistor, or configured as a driven output, or can be driven from an external source.
DS060 (v1.6) September 19, 2001
www.xilinx.com
61
Product Specification
1-800-255-7778
XILINX [ XILINX, INC ]
