R
Spartan and Spartan-XL Families Field Programmable Gate Arrays
Spartan-XL Pin-to-Pin Output Parameter Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Pin-to-pin timing parameters are
derived from measuring external and internal test patterns
and are guaranteed over worst-case operating conditions
(supply voltage and junction temperature). Listed below are
representative values for typical pin locations and normal
clock loading.
Spartan-XL Output Flip-Flop, Clock-to-Out
Speed Grade
-5
-4
Symbol
Description
Device
Max
Max
Units
Global Clock to Output using OFF
T
Fast
XCS05XL
XCS10XL
XCS20XL
XCS30XL
XCS40XL
4.6
4.9
5.2
5.5
5.8
5.2
5.5
5.8
6.2
6.5
ns
ns
ns
ns
ns
ICKOF
Slew Rate Adjustment
For Output SLOW option add
T
All Devices
1.5
1.7
ns
SLOW
Notes:
1. Output delays are representative values where one global clock input drives one vertical clock line in each accessible column,and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
2. Output timing is measured at ~50% V threshold with 50 pF external capacitive load.
CC
3. OFF = Output Flip Flop
58
www.xilinx.com
DS060 (v1.6) September 19, 2001
1-800-255-7778
Product Specification
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