欢迎访问ic37.com |
会员登录 免费注册
发布采购

XCS20-3PQ208C 参数 Datasheet PDF下载

XCS20-3PQ208C图片预览
型号: XCS20-3PQ208C
PDF下载: 下载PDF文件 查看货源
内容描述: 斯巴达和Spartan-XL系列现场可编程门阵列 [Spartan and Spartan-XL Families Field Programmable Gate Arrays]
分类和应用: 现场可编程门阵列
文件页数/大小: 82 页 / 848 K
品牌: XILINX [ XILINX, INC ]
 浏览型号XCS20-3PQ208C的Datasheet PDF文件第45页浏览型号XCS20-3PQ208C的Datasheet PDF文件第46页浏览型号XCS20-3PQ208C的Datasheet PDF文件第47页浏览型号XCS20-3PQ208C的Datasheet PDF文件第48页浏览型号XCS20-3PQ208C的Datasheet PDF文件第50页浏览型号XCS20-3PQ208C的Datasheet PDF文件第51页浏览型号XCS20-3PQ208C的Datasheet PDF文件第52页浏览型号XCS20-3PQ208C的Datasheet PDF文件第53页  
R
Spartan and Spartan-XL Families Field Programmable Gate Arrays  
Spartan Pin-to-Pin Input Parameter Guidelines  
Testing of switching parameters is modeled after testing  
methods specified by MIL-M-38510/605. All devices are  
100% functionally tested. Pin-to-pin timing parameters are  
derived from measuring external and internal test patterns  
and are guaranteed over worst-case operating conditions  
(supply voltage and junction temperature). Listed below are  
representative values for typical pin locations and normal  
clock loading.  
Spartan Primary and Secondary Setup and Hold  
Speed Grade  
-4  
-3  
Symbol  
Description  
Device  
Min  
Min  
Units  
Input Setup/Hold Times Using Primary Clock and IFF  
T
/T  
No Delay  
XCS05  
XCS10  
XCS20  
XCS30  
XCS40  
XCS05  
XCS10  
XCS20  
XCS30  
XCS40  
1.2 / 1.7  
1.0 / 2.3  
0.8 / 2.7  
0.6 / 3.0  
0.4 / 3.5  
4.3 / 0.0  
4.3 / 0.0  
4.3 / 0.0  
4.3 / 0.0  
5.3 / 0.0  
1.8 / 2.5  
1.5 / 3.4  
1.2 / 4.0  
0.9 / 4.5  
0.6 / 5.2  
6.0 / 0.0  
6.0 / 0.0  
6.0 / 0.0  
6.0 / 0.0  
6.8 / 0.0  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
PSUF PHF  
T
/T  
With Delay  
PSU PH  
Input Setup/Hold Times Using Secondary Clock and IFF  
T
/T  
No Delay  
XCS05  
XCS10  
XCS20  
XCS30  
XCS40  
XCS05  
XCS10  
XCS20  
XCS30  
XCS40  
0.9 / 2.2  
0.7 / 2.8  
0.5 / 3.2  
0.3 / 3.5  
0.1 / 4.0  
4.0 / 0.0  
4.0 / 0.0  
4.0 / 0.5  
4.0 / 0.5  
5.0 / 0.0  
1.5 / 3.0  
1.2 / 3.9  
0.9 / 4.5  
0.6 / 5.0  
0.3 / 5.7  
5.7 / 0.0  
5.7 / 0.0  
5.7 / 0.5  
5.7 / 0.5  
6.5 / 0.0  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
SSUF SHF  
T
/T  
With Delay  
SSU SH  
Notes:  
1. Setup time is measured with the fastest route and the lightest load. Hold time is measured using the furthest distance and a  
reference load of one clock pin per IOB/CLB.  
2. IFF = Input Flip-flop or Latch  
DS060 (v1.6) September 19, 2001  
www.xilinx.com  
49  
Product Specification  
1-800-255-7778  
 复制成功!