R
Platform Flash In-System Programmable Configuration PROMS
XCF01S, XCF02S,
XCF04S
XCF08P, XCF16P,
XCF32P
Symbol
Description
Min
Max
Min
Max
Units
REV_SEL hold time from CF (rising edge)
when VCCO = 3.3V or 2.5V
-
-
TBD
TBD
ns
THRV
REV_SEL hold time from CF (rising edge)
when VCCO = 1.8V
-
-
TBD
TBD
ns
CLKOUT default (fast) frequency
-
-
-
-
-
-
TBD
TBD
TBD
TBD
TBD
TBD
ns
ns
ns
TFF
CLKOUT default (fast) frequency with compression
CLKOUT alternate (slower) frequency
TSF
CLKOUT alternate (slower) frequency with
compression
-
-
TBD
TBD
ns
Notes:
1. AC test load = 50 pF.
2. Float delays are measured with 5 pF AC loads. Transition is measured at 200 mV from steady state active levels.
3. Guaranteed by design, not tested.
4. All AC parameters are measured with VIL = 0.0V and VIH = 3.0V.
5. If THCE High < 2 µs, TCE = 2 µs.
6. If THOE Low < 2 µs, TOE = 2 µs.
7. Minimum possible TCYC. Actual TCYC = TCAC + FPGA data setup time. With VCCO = 3.3V, if FPGA data setup time = 15 ns,
actual TCYC = 15 ns + 15 ns = 30 ns.
DS123 (v2.4) July 20, 2004
www.xilinx.com
29
Preliminary Product Specification
1-800-255-7778
XILINX [ XILINX, INC ]
