R
Platform Flash In-System Programmable Configuration PROMs
Platform Flash PROM TAP Characteristics
The Platform Flash PROM family performs both in-system
programming and IEEE 1149.1 Boundary-Scan (JTAG) testing
via a single 4-wire Test Access Port (TAP). This simplifies
system designs and allows standard Automatic Test
Equipment to perform both functions. The AC characteristics
of the Platform Flash PROM TAP are described as follows.
X-Ref Target - Figure 4
TAP Timing
shows the timing relationships of the TAP signals.
These TAP timing characteristics are identical for both
Boundary-Scan and ISP operations.
T
CKMIN
TCK
T
MSS
T
MSH
TMS
T
DIS
T
DIH
TDI
T
DOV
TDO
DS123_04_031808
Figure 4:
Test Access Port Timing
TAP AC Parameters
shows the timing parameters for the TAP waveforms shown in
Table 10:
Test Access Port Timing Parameters
Symbol
T
CKMIN
T
MSS
T
MSH
T
DIS
T
DIH
T
DOV
Description
TCK minimum clock period when V
CCJ
= 2.5V or 3.3V
TMS setup time when V
CCJ
= 2.5V or 3.3V
TMS hold time when V
CCJ
= 2.5V or 3.3V
TDI setup time when V
CCJ
= 2.5V or 3.3V
TDI hold time when V
CCJ
= 2.5V or 3.3V
TDO valid delay when V
CCJ
= 2.5V or 3.3V
Min
67
8
25
8
25
–
Max
–
–
–
–
–
22
Units
ns
ns
ns
ns
ns
ns
DS123 (v2.13.1) April 3, 2008
Product Specification
9