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Platform Flash In-System Programmable Configuration PROMs
Design Security
The Xilinx in-system programmable Platform Flash PROM
devices incorporate advanced data security features to fully
protect the FPGA programming data against unauthorized
reading via JTAG. The XCFxxP PROMs can also be
programmed to prevent inadvertent writing via JTAG.
and
show the security settings available for
the XCFxxS PROM and XCFxxP PROM, respectively.
Write Protection
The XCFxxP PROM device also allows the user to write
protect (or lock) a particular design revision to prevent
inadvertent erase or program operations. Once set, the
write protect security bit for an individual design revision
must be reset (using the UNLOCK command followed by
ISC_ERASE command) before an erase or program
operation can be performed.
Table 4:
XCFxxS Device Data Security Options
Read Protect
Reset (default)
Set
Read Protection
The read protect security bit can be set by the user to
prevent the internal programming pattern from being read or
copied via JTAG. Read protection does not prevent write
operations. For the XCFxxS PROM, the read protect
security bit is set for the entire device, and resetting the read
protect security bit requires erasing the entire device. For
the XCFxxP PROM the read protect security bit can be set
for individual design revisions, and resetting the read
protect bit requires erasing the particular design revision.
Table 5:
XCFxxP Design Revision Data Security Options
Read Protect
Reset (default)
Reset (default)
Set
Set
Read/Verify
Inhibited
Program
Inhibited
Erase
Inhibited
Write Protect
Reset (default)
Set
Reset (default)
Set
Read/Verify
Inhibited
Program Inhibited
Erase Inhibited
DS123 (v2.13.1) April 3, 2008
Product Specification
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