R
Functional Description
BUFGMUX pair connects to four of the eight global clock
inputs, as shown in Figure 42. This optionally allows differ-
ential inputs to the global clock inputs without wasting a
BUFGMUX element.
The connections for the bottom-edge BUFGMUX elements
is similar to the top-edge connections.
On the left and right edges, only two clock inputs feed each
pair of BUFGMUX elements.
Global Clock Inputs
GCLK11 GCLK7
GCLK9 GCLK5
GCLK10 GCLK6
GCLK8 GCLK4
BUFGMUX
pair
DCM
Clock Line
DCM
XC3S100E (X0Y1)
XC3S250E (X1Y1)
XC3S500E (X1Y1)
XC3S1200E (X2Y3)
XC3S1600E (X2Y3)
in Quadrant
XC3S250E (X0Y1)
XC3S500E (X0Y1)
XC3S1200E (X1Y3)
XC3S1600E (X1Y3)
4
4
X1Y10 X1Y11
X2Y10 X2Y11
BUFGMUX
4
4
H
G
F
E
H
G
H
Top Left Quadrant (TL)
Top Right Quadrant (TR)
4
G
4
4
4
•
•
4
DCM
XC3S1200E (X0Y2)
XC3S1600E (X0Y2)
8
DCM
XC3S1200E (X3Y2)
XC3S1600E (X3Y2)
8
•
•
•
4
4
4
4
F
F
•
E
D
E
D
Figure 44a
Figure 44b
8
8
8
8
Left Spine
Right Spine
Horizontal
Spine
Figure 44b
Figure 44a
•
8
•
8
C
C
4
4
4
4
DCM
XC3S1200E (X0Y1)
XC3S1600E (X0Y1)
DCM
XC3S1200E (X3Y1)
XC3S1600E (X3Y1)
•
•
4
4
4
4
•
•
B
A
B
A
4
Bottom Right Quadrant (BR)
Bottom Left Quadrant (BL)
4
4
DCM
DCM
D
C
B
A
XC3S100E (X0Y0)
XC3S250E (X1Y0)
XC3S500E (X1Y0)
XC3S1200E (X2Y0)
XC3S1600E (X2Y0)
XC3S250E (X0Y0)
XC3S500E (X0Y0)
XC3S1200E (X1Y0)
XC3S1600E (X1Y0)
4
4
X1Y0 X1Y1
X2Y0 X2Y1
GCLK2 GCLK14
GCLK0 GCLK12
GCLK3 GCLK15
GCLK1 GCLK13
DS312-2_04_030205
Global Clock Inputs
Notes:
1. Number of DCMs and locations of these DCM varies for different device densities.
2. The left and right DCMs are only in the XC3S1200E and XC3S1600E. The XC3S100E has only two DCMs, one on the top right
and one on the bottom right of the die.
Figure 42: Spartan-3E Internal Quadrant-Based Clock Network (Top View)
DS312-2 (v1.1) March 21, 2005
www.xilinx.com
49
Advance Product Specification
XILINX [ XILINX, INC ]
