R
Pinout Descriptions
Table 29: FG400 Package Pinout
Table 29: FG400 Package Pinout
XC3S1200E
XC3S1600E
Pin Name
XC3S1200E
XC3S1600E
Pin Name
FG400
Ball
FG400
Bank
Type
Bank
Ball
M13
N8
Type
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
J10
J12
K9
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
N10
N12
K11
L10
L12
M9
User I/Os by Bank
Table 30 indicates how the 304 available user-I/O pins are
distributed between the four I/O banks on the FG400 pack-
age.
M11
Table 30: User I/Os Per Bank for the XC3S250E and XC3S500E in the FG400 Package
All Possible I/O Pins by Type
Package
Edge
Maximum
I/O
I/O Bank
I/O
43
INPUT
DUAL
1
VREF
GCLK
Top
0
1
2
3
78
74
20
12
18
12
62
6
6
8
0
Right
35
21
24
0
Bottom
Left
78
30
6
0
74
48
6
8
TOTAL
304
156
46
24
16
between the XC3S1200E and XC3S1600E FPGAs without
further consideration.
Footprint Migration Differences
The XC3S1200E and XC3S1600E FPGAs have identical
footprints in the FG400 package. Designs can migrate
DS312-4 (v1.1) March 21, 2005
www.xilinx.com
59
Advance Product Specification
XILINX [ XILINX, INC ]
