R
Pinout Descriptions
Table 24: FG320 Package Pinout (Continued)
FG320
Ball
Bank
XC3S500E Pin Name
XC3S1200E Pin Name
XC3S1600E Pin Name
Type
INPUT
3
3
3
3
3
3
3
3
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
IP
K7
M1
N1
N2
R1
U1
J6
INPUT
INPUT
INPUT
INPUT
INPUT
IP/VREF_3
IO/VREF_3
IP/VREF_3
IP/VREF_3
IP/VREF_3
IP/VREF_3
VREF
R4
500E: VREF(I/O)
1200E:
VREF(INPUT)
1600E:
VREF(INPUT)
3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
F3
H7
VCCO
VCCO
VCCO
VCCO
VCCO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
K1
3
L7
3
N3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A1
GND
GND
GND
A18
B2
GND
GND
GND
GND
GND
GND
B17
C10
G7
G12
H8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
H9
GND
GND
GND
H10
H11
J3
GND
GND
GND
GND
GND
GND
GND
GND
GND
J8
GND
GND
GND
J11
K8
GND
GND
GND
GND
GND
GND
K11
K16
L8
GND
GND
GND
GND
GND
GND
GND
GND
GND
L9
48
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DS312-4 (v1.1) March 21, 2005
Advance Product Specification
XILINX [ XILINX, INC ]
