欢迎访问ic37.com |
会员登录 免费注册
发布采购

XC2V2000-4BGG575I 参数 Datasheet PDF下载

XC2V2000-4BGG575I图片预览
型号: XC2V2000-4BGG575I
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 2688 CLBs, 2000000 Gates, 650MHz, 24192-Cell, CMOS, PBGA575, 31 X 31 MM, 1.27 MM PITCH, LEAD FREE, MS-034BAN-1, BGA-575]
分类和应用: 时钟可编程逻辑
文件页数/大小: 319 页 / 1869 K
品牌: XILINX [ XILINX, INC ]
 浏览型号XC2V2000-4BGG575I的Datasheet PDF文件第30页浏览型号XC2V2000-4BGG575I的Datasheet PDF文件第31页浏览型号XC2V2000-4BGG575I的Datasheet PDF文件第32页浏览型号XC2V2000-4BGG575I的Datasheet PDF文件第33页浏览型号XC2V2000-4BGG575I的Datasheet PDF文件第35页浏览型号XC2V2000-4BGG575I的Datasheet PDF文件第36页浏览型号XC2V2000-4BGG575I的Datasheet PDF文件第37页浏览型号XC2V2000-4BGG575I的Datasheet PDF文件第38页  
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —  
R
Virtex-II Platform FPGAs: Functional Description  
Each SelectRAM memory and multiplier block is tied to four  
switch matrices, as shown in Figure 35.  
Configuration  
The multiplier block is an 18-bit by 18-bit signed multiplier  
(2's complement). Both A and B are 18-bit-wide inputs, and  
the output is 36 bits. Figure 36 shows a multiplier block.  
Switch  
Matrix  
Multiplier Block  
A[17:0]  
Switch  
Matrix  
MULT 18 x 18  
P[35:0]  
18-Kbit block  
SelectRAM  
B[17:0]  
Switch  
Matrix  
DS031_40_100400  
Figure 36: Multiplier Block  
Switch  
Matrix  
Locations / Organization  
Multiplier organization is identical to the 18 Kbit SelectRAM  
organization, because each multiplier is associated with an  
18 Kbit block SelectRAM resource.  
DS031_33_101000  
Figure 35: SelectRAM and Multiplier Blocks  
In addition to the built-in multiplier blocks, the CLB elements  
have dedicated logic to implement efficient multipliers in  
logic. (Refer to Configurable Logic Blocks (CLBs)).  
Association With Block SelectRAM Memory  
The interconnect is designed to allow SelectRAM memory  
and multiplier blocks to be used at the same time, but some  
interconnect is shared between the SelectRAM and the  
multiplier. Thus, SelectRAM memory can be used only up to  
18 bits wide when the multiplier is used, because the multi-  
plier shares inputs with the upper data bits of the  
SelectRAM memory.  
Table 20: Multiplier Floor Plan  
Multipliers  
Device  
Columns  
Per Column  
Total  
4
XC2V40  
2
2
4
4
4
4
4
6
6
6
6
2
This sharing of the interconnect is optimized for an  
18-bit-wide block SelectRAM resource feeding the multi-  
plier. The use of SelectRAM memory and the multiplier with  
an accumulator in LUTs allows for implementation of a digi-  
tal signal processor (DSP) multiplier-accumulator (MAC)  
function, which is commonly used in finite and infinite  
impulse response (FIR and IIR) digital filters.  
XC2V80  
4
8
XC2V250  
XC2V500  
XC2V1000  
XC2V1500  
XC2V2000  
XC2V3000  
XC2V4000  
XC2V6000  
XC2V8000  
6
24  
8
32  
10  
12  
14  
16  
20  
24  
28  
40  
48  
56  
96  
120  
144  
168  
DS031-2 (v4.0) April 7, 2014  
Product Specification  
www.xilinx.com  
Module 2 of 4  
26  
 
 
 复制成功!