R
Virtex™-II Platform FPGAs: Detailed Description
Single-Port Configuration
Dual-Port Configuration
As a single-port RAM, the block SelectRAM has access to
the 18 Kbit memory locations in any of the 2K x 9-bit,
1K x 18-bit, or 512 x 36-bit configurations and to 16 Kbit
memory locations in any of the 16K x 1-bit, 8K x 2-bit, or
4K x 4-bit configurations. The advantage of the 9-bit, 18-bit
and 36-bit widths is the ability to store a parity bit for each
eight bits. Parity bits must be generated or checked exter-
nally in user logic. In such cases, the width is viewed as 8 +
1, 16 + 2, or 32 + 4. These extra parity bits are stored and
behave exactly as the other bits, including the timing param-
eters. Video applications can use the 9-bit ratio of Virtex-II
block SelectRAM memory to advantage.
As a dual-port RAM, each port of block SelectRAM has
access to a common 18 Kbit memory resource. These are
fully synchronous ports with independent control signals for
each port. The data widths of the two ports can be config-
ured independently, providing built-in bus-width conversion.
Table 14 illustrates the different configurations available on
ports A & B.
Each block SelectRAM cell is a fully synchronous memory
as illustrated in Figure 29. Input data bus and output data
bus widths are identical.
18 Kbit Block SelectRAM
DI
DIP
ADDR
WE
EN
SSR
CLK
DO
DOP
DS031_10_071602
Figure 29: 18 Kbit Block SelectRAM Memory in
Single-Port Mode
Table 14: Dual-Port Mode Configurations
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
16K x 1
16K x 1
8K x 2
16K x 1
8K x 2
16K x 1
4K x 4
16K x 1
2K x 9
16K x 1
1K x 18
8K x 2
16K x 1
512 x 36
8K x 2
8K x 2
8K x 2
8K x 2
4K x 4
2K x 9
1K x 18
4K x 4
512 x 36
4K x 4
4K x 4
4K x 4
4K x 4
2K x 9
1K x 18
2K x 9
512 x 36
2K x 9
2K x 9
2K x 9
1K x 18
1K x 18
512 x 36
512 x 36
1K x 18
1K x 18
512 x 36
512 x 36
If both ports are configured in either 2K x 9-bit, 1K x 18-bit,
or 512 x 36-bit configurations, the 18 Kbit block is accessi-
ble from port A or B. If both ports are configured in either
16K x 1-bit, 8K x 2-bit. or 4K x 4-bit configurations, the
16 K-bit block is accessible from Port A or Port B. All other
configurations result in one port having access to an 18 Kbit
memory block and the other port having access to a 16 K-bit
subset of the memory block equal to 16 Kbits.
DS031-2 (v3.0) August 1, 2003
Product Specification
www.xilinx.com
1-800-255-7778
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