R
Virtex™-II Platform FPGAs: Detailed Description
COUT
COUT
to S0 of the next CLB
to CIN of S2 of the next CLB
MUXCY
O
O
I
I
FF
FF
LUT
LUT
(First Carry Chain)
SLICE S3
MUXCY
CIN
COUT
MUXCY
O
O
I
I
FF
FF
LUT
LUT
SLICE S2
MUXCY
MUXCY
FF
O
O
I
I
LUT
LUT
SLICE S1
MUXCY
FF
CIN
COUT
(Second Carry Chain)
MUXCY
FF
O
O
I
I
LUT
LUT
SLICE S0
MUXCY
FF
CIN
CIN
CLB
DS031_07_110200
Figure 24: Fast Carry Logic Path
DS031-2 (v3.0) August 1, 2003
Product Specification
www.xilinx.com
1-800-255-7778
Module 2 of 4
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