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DS705 参数 Datasheet PDF下载

DS705图片预览
型号: DS705
PDF下载: 下载PDF文件 查看货源
内容描述: 了XA Spartan -3A DSP FPGA汽车系列数据手册 [XA Spartan-3A DSP Automotive FPGA Family Data Sheet]
分类和应用:
文件页数/大小: 54 页 / 1437 K
品牌: XILINX [ XILINX, INC ]
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XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Power Supply Specifications
Table 5:
Supply Voltage Thresholds for Power-On Reset
Symbol
V
CCINTT
V
CCAUXT
V
CCO2T
Notes:
1.
V
CCINT
, V
CCAUX
, and V
CCO
supplies to the FPGA can be applied in any order. However, the FPGA configuration source (SPI Flash, parallel
NOR Flash, microcontroller) might have specific requirements. Check the data sheet for the attached configuration source. Apply V
CCINT
last
for lowest overall power consumption (see the
chapter titled “Powering Spartan-3 Generation FPGAs” for more information).
To ensure successful power-on, V
CCINT
, V
CCO
Bank 2, and V
CCAUX
supplies must rise through their respective threshold-voltage ranges with
no dips at any point.
Description
Threshold for the V
CCINT
supply
Threshold for the V
CCAUX
supply
Threshold for the V
CCO
Bank 2 supply
Min
0.4
1.0
1.0
Max
1.0
2.0
2.0
Units
V
V
V
2.
Table 6:
Supply Voltage Ramp Rate
Symbol
V
CCINTR
V
CCAUXR
V
CCO2R
Notes:
1.
V
CCINT
, V
CCAUX
, and V
CCO
supplies to the FPGA can be applied in any order. However, the FPGA configuration source (SPI Flash, parallel
NOR Flash, microcontroller) might have specific requirements. Check the data sheet for the attached configuration source. Apply V
CCINT
last
for lowest overall power consumption (see the
chapter titled “Powering Spartan-3 Generation FPGAs” for more information).
To ensure successful power-on, V
CCINT
, V
CCO
Bank 2, and V
CCAUX
supplies must rise through their respective threshold-voltage ranges with
no dips at any point.
Description
Ramp rate from GND to valid V
CCINT
supply level
Ramp rate from GND to valid V
CCAUX
supply level
Ramp rate from GND to valid V
CCO
Bank 2 supply level
Min
0.2
0.2
0.2
Max
100
100
100
Units
ms
ms
ms
2.
Table 7:
Supply Voltage Levels Necessary for Preserving CMOS Configuration Latch (CCL) Contents and RAM
Data
Symbol
V
DRINT
V
DRAUX
Description
V
CCINT
level required to retain CMOS Configuration Latch (CCL) and RAM data
V
CCAUX
level required to retain CMOS Configuration Latch (CCL) and RAM data
Min
1.0
2.0
Units
V
V
DS705 (v1.1) January 20, 2009
Product Specification
7