R
Table 10: DC Characteristics of User I/Os Using
Single-Ended Standards (Continued)
Table 10: DC Characteristics of User I/Os Using
Single-Ended Standards
Test
Conditions
Logic Level
Characteristics
Test
Conditions
Logic Level
Characteristics
VOL
Max (V)
VOH
Min (V)
VOL
Max (V)
VOH
Min (V)
IOSTANDARD
Attribute
IOL
(mA) (mA)
IOH
IOSTANDARD
Attribute
IOL
(mA) (mA)
IOH
LVCMOS12(3)
PCI33_3(4)
HSTL_I_18
HSTL_III_18
SSTL18_I
2
2
–2
0.4
VCCO - 0.4
90% VCCO
VCCO - 0.4
VCCO - 0.4
VTT + 0.475
LVTTL(3)
2
4
6
8
2
4
–2
–4
0.4
2.4
1.5
8
–0.5 10% VCCO
–8
–8
0.4
0.4
6
–6
24
6.7
8.1
8
–8
VTT – 0.475
–6.7
12
16
2
12
16
2
–12
–16
–2
SSTL2_I
–8.1 VTT – 0.61
VTT + 0.61
LVCMOS33(3)
0.4
VCCO – 0.4
Notes:
1. The numbers in this table are based on the conditions set forth in
Table 6 and Table 9.
4
4
–4
2. Descriptions of the symbols used in this table are as follows:
6
6
–6
IOL – the output current condition under which VOL is tested
IOH – the output current condition under which VOH is tested
VOL – the output voltage that indicates a Low logic level
VOH – the output voltage that indicates a High logic level
VCCO – the supply voltage for output drivers
8
8
–8
12
16
2
12
16
2
–12
–16
–2
VTT – the voltage applied to a resistor termination
LVCMOS25(3)
0.4
VCCO – 0.4
3. For the LVCMOS and LVTTL standards: the same V and V
OL
OH
limits apply for both the Fast and Slow slew attributes.
4
4
–4
4. Tested according to the relevant PCI specifications. For
information on PCI IP solutions, see www.xilinx.com/pci.
6
6
–6
8
8
–8
12
2
12
2
–12
–2
LVCMOS18(3)
LVCMOS15(3)
0.4
0.4
VCCO – 0.4
4
4
–4
6
6
–6
8
8
–8
2
2
–2
VCCO – 0.4
4
4
–4
6
6
–6
DS635 (v2.0) September 9, 2009
www.xilinx.com
Product Specification
12
XILINX [ XILINX, INC ]
