R
Spartan-IIE FPGA Family: DC and Switching Characteristics
CCLK
T
CS
T
SMCCCS
SMCSCC
T
WRITE
T
SMWCC
SMCCW
T
SMDCC
T
SMCCD
DATA[7:0]
BUSY
T
SMCKBY
No Write
Write
No Write
Write
DS001_20_061200
All Devices
Symbol
Description
Min
Max
Units
TSMDCC
TSMCCD
TSMCSCC
TSMCCCS
TSMCCW
TSMWCC
TSMCKBY
FCC
/
D0-D7 setup/hold
5 / 1
7 / 1
7 / 1
-
ns
/
CS setup/hold
-
-
ns
ns
/
WRITE setup/hold
CCLK
BUSY propagation delay
Frequency
-
-
-
12
66
50
ns
MHz
MHz
FCCNH
Frequency with no handshake
Figure 26: Slave Parallel (SelectMAP) Mode Write Timing
CCLK
CS
WRITE
DATA[7:0]
BUSY
Abort
DS001_21_032300
Figure 27: Slave Parallel (SelectMAP) Mode Write Abort Waveforms
50
www.xilinx.com
DS077-3 (v2.3) June 18, 2008
Product Specification
XILINX [ XILINX, INC ]
