R
Spartan and Spartan-XL FPGA Families Data Sheet
C
OUT
M
G1
G4
M
1
0
1
G2
G3
0
I
C
TO
OUT0
FUNCTION
GENERATORS
M
F2
F1
M
M
1
0
0
1
M
F4
M
M
0
1
3
1
0
F3
M
C
M
IN
DS060_17_080400
Figure 17: Detail of Spartan/XL Dedicated Carry Logic
Three-State Buffer Example
3-State Long Line Drivers
Figure 18 shows how to use the 3-state buffers to imple-
ment a multiplexer. The selection is accomplished by the
buffer 3-state signal.
A pair of 3-state buffers is associated with each CLB in the
array. These 3-state buffers (BUFT) can be used to drive
signals onto the nearest horizontal longlines above and
below the CLB. They can therefore be used to implement
multiplexed or bidirectional buses on the horizontal lon-
glines, saving logic resources.
Pay particular attention to the polarity of the T pin when
using these buffers in a design. Active High 3-state (T) is
identical to an active Low output enable, as shown in
Table 11.
There is a weak keeper at each end of these two horizontal
longlines. This circuit prevents undefined floating levels.
However, it is overridden by any driver.
Table 11: Three-State Buffer Functionality
IN
X
T
1
0
OUT
Z
The buffer enable is an active High 3-state (i.e., an active
Low enable), as shown in Table 11.
IN
IN
Z = (D • A) + (D • B) + (D • C) + (D • N)
A
B
C
N
~100 kΩ
D
A
D
B
D
C
D
N
BUFT
BUFT
BUFT
BUFT
A
B
C
N
"Weak Keeper"
DS060_18_080400
Figure 18: 3-state Buffers Implement a Multiplexer
DS060 (v1.8) June 26, 2008
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Product Specification
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