R
Virtex-II Platform FPGAs: Pinout Information
Table 9: BG575/BGG575 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
Pin Description
IO_L69P_2/VREF_2
IO_L70N_2
Pin Number No Connect in XC2V1000 No Connect in XC2V1500
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
L18
K23
L24
K22
L22
L21
NC
NC
NC
NC
NC
NC
NC
IO_L70P_2
IO_L72N_2
IO_L72P_2
IO_L73N_2
NC
NC
IO_L73P_2
L20
M23
N24
M21
M22
M19
M20
M17
M18
IO_L91N_2
IO_L91P_2
IO_L93N_2
IO_L93P_2/VREF_2
IO_L94N_2
IO_L94P_2
IO_L96N_2
IO_L96P_2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IO_L96N_3
IO_L96P_3
N23
N22
N20
N21
N19
N18
N17
P17
P24
R24
R23
R22
P22
P21
P20
P18
T24
U24
T23
T22
IO_L94N_3
IO_L94P_3
IO_L93N_3/VREF_3
IO_L93P_3
IO_L91N_3
IO_L91P_3
IO_L73N_3
IO_L73P_3
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IO_L72N_3
IO_L72P_3
IO_L70N_3
IO_L70P_3
IO_L69N_3/VREF_3
IO_L69P_3
IO_L67N_3
IO_L67P_3
IO_L54N_3
IO_L54P_3
DS031-4 (v3.5) November 5, 2007
Product Specification
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