R
Virtex-II Platform FPGAs: Pinout Information
BG575/BGG575 Standard BGA Package
As shown in Table 9, XC2V1000, XC2V1500, and XC2V2000 Virtex-II devices are available in the BG575/BGG575 BGA
package. Pins in the XC2V1000, XC2V1500, and XC2V2000 devices are the same, except for the pin differences in the
XC2V1000 and XC2V1500 devices shown in the No Connect columns. Following this table are the BG575/BGG575
Standard BGA Package Specifications (1.27mm pitch).
Table 9: BG575/BGG575 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
0
Pin Description
IO_L01N_0
Pin Number No Connect in XC2V1000 No Connect in XC2V1500
A3
A4
D5
C5
E6
D6
F7
0
IO_L01P_0
0
IO_L02N_0
0
IO_L02P_0
0
IO_L03N_0/VRP_0
IO_L03P_0/VRN_0
IO_L04N_0/VREF_0
IO_L04P_0
0
0
0
E7
G8
H9
A5
A6
B5
B6
D7
C7
F8
0
IO_L05N_0
0
IO_L05P_0
0
IO_L06N_0
0
IO_L06P_0
0
IO_L19N_0
0
IO_L19P_0
0
IO_L21N_0
0
IO_L21P_0/VREF_0
IO_L22N_0
0
0
IO_L22P_0
E8
G9
F9
0
IO_L24N_0
0
IO_L24P_0
0
IO_L49N_0
G10
H10
B7
B8
D8
C8
E9
D9
0
IO_L49P_0
0
IO_L51N_0
0
IO_L51P_0/VREF_0
IO_L52N_0
0
0
IO_L52P_0
0
IO_L54N_0
0
IO_L54P_0
0
IO_L67N_0
A8
A9
C9
NC
NC
NC
0
IO_L67P_0
0
IO_L69N_0
DS031-4 (v3.5) November 5, 2007
Product Specification
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