Platform Cable USB II
X-Ref Target - Figure 16
VCCAUX
TDO
TDI
JTAG CHAIN
(4)
A
B
Y
TDI
TDO
TMS
TCK
S
TMS
TCK
(4)
A
B
Y
A
(1)
VCCAUX
2-mm
Connector
S
(4)
V
2
REF
Y
B
TDO
8
S
TDI 10
VCCAUX
TMS
4
6
MUX Truth Table
Required
Pull-Up(3)
1 KΩ
S
H
L
Output
Y = A
TCK
Y = B
(5)
PGND
13
*
(2)
GND
DS593_16_021408
Notes:
1. Example implies that V
, V
, and/or V
for various devices in the JTAG chain are set to the same voltage.
CCAUX
CCO CCJ
2. Attach the following 2-mm connector pins to digital ground: 3, 5, 7, 9, and 11.
3. The cable uses an open-drain driver to control the pseudo ground (PGND) signal — an external pull-up resistor is required.
4. Assumes that the multiplexor supply voltages pins are connected to V
.
CCAUX
5. Pin 13 is grounded on legacy Xilinx USB cables (models DLC9, DLC9G and DLC9LP), and Parallel Cable IV (model DLC7). These cables
need to be manually detached from the 2-mm connector to allow the primary configuration source to have access to the JTAG chain.
Figure 16: Example Using PGND in a JTAG Chain
DS593 (v1.2.1) March 17, 2011
www.xilinx.com
16
XILINX [ XILINX, INC ]
