R
XC3000 Series Field Programmable Gate Arrays
XC3000 Series 68-Pin PLCC, 84-Pin PLCC and PGA Pinouts
XC3000A, XC3000L, XC3100A, and XC3100L families have identical pinouts
68 PLCC
68 PLCC
XC3020A, XC3030A,
XC3042A
XC3020A, XC3030A,
XC3042A
XC3030A XC3020A
84 PLCC
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
XC3030A XC3020A
84 PLCC
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
1
10
11
12
13
14
—
15
16
—
17
18
19
—
20
—
21
22
23
24
25
26
27
28
29
30
—
—
31
32
33
34
35
36
37
38
39
—
—
40
41
42
43
10
11
—
12
13
—
14
15
16
17
18
19
—
20
21
22
—
23
24
25
26
27
28
29
30
31
PWRDN
TCLKIN-I/O
I/O*
44
45
46
47
48
—
49
50
51
—
52
53
54
55
—
—
56
57
58
59
60
61
62
63
64
—
—
65
66
67
68
1
44
45
46
47
48
—
49
50
51
—
52
53
54
55
—
—
56
57
58
59
60
61
62
63
64
—
—
65
66
67
68
1
RESET
DONE-PG
D7-I/O
I/O
XTL1(OUT)-BCLKIN-I/O
D6-I/O
I/O
I/O
I/O
I/O
D5-I/O
I/O
CS0-I/O
D4-I/O
I/O
I/O
I/O
VCC
I/O
VCC
D3-I/O
I/O
CS1-I/O
D2-I/O
I/O
I/O
I/O
I/O
I/O*
I/O
D1-I/O
I/O
RDY/BUSY-RCLK-I/O
D0-DIN-I/O
DOUT-I/O
CCLK
I/O
M1-RDATA
M0-RTRIG
M2-I/O
HDC-I/O
I/O
A0-WS-I/O
A1-CS2-I/O
A2-I/O
7
LDC-I/O
I/O
A3-I/O
I/O*
I/O*
I/O*
32
33
—
I/O
A15-I/O
A4-I/O
I/O
I/O*
A14-I/O
A5-I/O
34
35
36
37
38
39
40
41
INIT-I/O
GND
I/O
GND
2
2
A13-I/O
A6-I/O
2
I/O
3
3
3
I/O
4
4
A12-I/O
A7-I/O
4
I/O
5
5
5
I/O
—
—
6
—
—
6
I/O*
6
I/O
I/O*
7
I/O*
A11-I/O
A8-I/O
8
I/O*
7
7
9
42
43
I/O
8
8
A10-I/O
A9-I/O
10
11
XTL2(IN)-I/O
9
9
Unprogrammed IOBs have a default pull-up. This prevents an undefined pad level for unbonded or unused IOBs.
Programmed outputs are default slew-rate limited.
This table describes the pinouts of three different chips in three different packages. The pin-description column lists 84 of the
118 pads on the XC3042A (and 84 of the 98 pads on the XC3030A) that are connected to the 84 package pins. Ten pads,
indicated by an asterisk, do not exist on the XC3020A, which has 74 pads; therefore the corresponding pins on the 84-pin
packages have no connections to an XC3020A. Six pads on the XC3020A and 16 pads on the XC3030A, indicated by a
dash (—) in the 68 PLCC column, have no connection to the 68 PLCC, but are connected to the 84-pin packages.
November 9, 1998 (Version 3.1)
7-67
XILINX [ XILINX, INC ]
