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5962-9561202MZC 参数 Datasheet PDF下载

5962-9561202MZC图片预览
型号: 5962-9561202MZC
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 230MHz, 484-Cell, CMOS, CQFP164, TOP BRAZED, CERAMIC, QFP-164]
分类和应用: 可编程逻辑
文件页数/大小: 76 页 / 730 K
品牌: XILINX [ XILINX, INC ]
 浏览型号5962-9561202MZC的Datasheet PDF文件第63页浏览型号5962-9561202MZC的Datasheet PDF文件第64页浏览型号5962-9561202MZC的Datasheet PDF文件第65页浏览型号5962-9561202MZC的Datasheet PDF文件第66页浏览型号5962-9561202MZC的Datasheet PDF文件第68页浏览型号5962-9561202MZC的Datasheet PDF文件第69页浏览型号5962-9561202MZC的Datasheet PDF文件第70页浏览型号5962-9561202MZC的Datasheet PDF文件第71页  
R
XC3000 Series Field Programmable Gate Arrays  
XC3000 Series 100-Pin QFP Pinouts  
XC3000A, XC3000L, XC3100A, and XC3100L families have identical pinouts  
Pin No.  
TQFP  
PQFP VQFP  
Pin No.  
TQFP  
PQFP VQFP  
Pin No.  
TQFP  
PQFP VQFP  
XC3020A  
XC3030A  
XC3042A  
XC3020A  
XC3030A  
XC3042A  
XC3020A  
XC3030A  
XC3042A  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
GND  
A13-I/O  
A6-I/O  
A12-I/O  
A7-I/O  
I/O*  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
81  
82  
83  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
I/O*  
I/O*  
84  
85  
86  
87  
88  
89  
90  
91  
92  
93  
94  
95  
96  
97  
98  
99  
100  
1
81  
82  
83  
84  
85  
86  
87  
88  
89  
90  
91  
92  
93  
94  
95  
96  
97  
98  
99  
100  
1
I/O*  
I/O*  
M1-RD  
GND*  
MO-RT  
VCC*  
M2-I/O  
HDC-I/O  
I/O  
I/O  
D5-I/O  
CS0-I/O  
D4-I/O  
I/O  
I/O*  
A11-I/O  
A8-I/O  
A10-I/O  
A9-I/O  
VCC*  
GND*  
PWRDN  
TCLKIN-I/O  
I/O**  
I/O*  
VCC  
D3-I/O  
CS1-I/O  
D2-I/O  
I/O  
LDC-I/O  
I/O*  
I/O*  
I/O  
I/O*  
I/O  
I/O*  
I/O  
D1-I/O  
RDY/BUSY-RCLK-I/O  
DO-DIN-I/O  
DOUT-I/O  
CCLK  
INIT-I/O  
GND  
I/O*  
I/O  
I/O  
I/O  
2
I/O  
I/O  
3
VCC*  
7
I/O  
I/O  
4
GND*  
I/O  
I/O  
5
2
AO-WS-I/O  
A1-CS2-I/O  
I/O**  
I/O  
I/O  
6
3
I/O  
I/O  
7
4
I/O  
I/O*  
8
5
A2-I/O  
A3-I/O  
I/O*  
VCC  
I/O  
I/O*  
9
6
XTL2-I/O  
GND*  
RESET  
VCC*  
DONE-PG  
D7-I/O  
BCLKIN-XTL1-I/O  
D6-I/O  
10  
11  
12  
13  
14  
15  
7
I/O  
8
I/O*  
I/O  
9
A15-I/O  
A4-I/O  
A14-I/O  
A5-I/O  
I/O  
10  
11  
12  
I/O  
I/O  
I/O  
I/O  
Unprogrammed IOBs have a default pull-up. This prevents an undefined pad level for unbonded or unused IOBs.  
Programmed outputs are default slew-rate limited.  
* This table describes the pinouts of three different chips in three different packages. The pin-description column lists 100 of  
the 118 pads on the XC3042A that are connected to the 100 package pins. Two pads, indicated by double asterisks, do not  
exist on the XC3030A, which has 98 pads; therefore the corresponding pins have no connections. Twenty-six pads,  
indicated by single or double asterisks, do not exist on the XC3020A, which has 74 pads; therefore, the corresponding pins  
have no connections. (See table on page 65.)  
November 9, 1998 (Version 3.1)  
7-69  
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