X28HC64
THE TOGGLE BIT I/O
6
Figure 4. Toggle Bit Bus Sequence
LAST
WRITE
WE
CE
OE
I/O6
VOH
*
VOL
HIGH Z
*
X28HC64
READY
* Beginning and ending state of I/O6 will vary.
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Figure 5. Toggle Bit Software Flow
The Toggle Bit can eliminate the software housekeeping
chore of saving and fetching the last address and data
written to a device in order to implement
DATA
Polling.
This can be especially helpful in an array comprised of
multiple X28HC64 memories that is frequently updated.
Toggle Bit Polling can also provide a method for status
checking in multiprocessor applications. The timing
diagram in Figure 4 illustrates the sequence of events on
the bus. The software flow diagram in Figure 5 illustrates
a method for polling the Toggle Bit.
LAST WRITE
LOAD ACCUM
FROM ADDR n
COMPARE
ACCUM WITH
ADDR n
COMPARE
OK?
YES
NO
READY
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5