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X28C256D 参数 Datasheet PDF下载

X28C256D图片预览
型号: X28C256D
PDF下载: 下载PDF文件 查看货源
内容描述: 5伏,可变的字节E2PROM [5 Volt, Byte Alterable E2PROM]
分类和应用: 存储内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 24 页 / 114 K
品牌: XICOR [ XICOR INC. ]
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X28C256  
HARDWARE DATA PROTECTION  
The X28C256 can be automatically protected during  
power-upandpower-downwithouttheneedforexternal  
circuits by employing the software data protection fea-  
ture. The internal software data protection circuit is  
enabled after the first write operation utilizing the soft-  
warealgorithm. Thiscircuitisnonvolatileandwillremain  
set for the life of the device unless the reset command  
is issued.  
The X28C256 provides three hardware features (com-  
patible with X28C64) that protect nonvolatile data from  
inadvertent writes.  
• Noise Protection—A WE pulse typically less than  
20ns will not initiate a write cycle.  
• Default V Sense—All write functions are inhibited  
CC  
when V is 3.5V typically.  
CC  
Once the software protection is enabled, the X28C256  
is also protected from inadvertent and accidental writes  
in the powered-up state. That is, the software algorithm  
must be issued prior to writing additional data to the  
device.  
• Write Inhibit—Holding either OE LOW, WE HIGH,  
or CE HIGH will prevent an inadvertent write cycle  
during power-up and power-down, maintaining data  
integrity.  
SOFTWARE DATA PROTECTION  
Software Algorithm  
The X28C256 offers a software controlled data protec-  
tionfeature.TheX28C256isshippedfromXicorwiththe  
software data protection NOT ENABLED; that is, the  
device will be in the standard operating mode. In this  
mode data should be protected during power-up/-down  
operations through the use of external circuits. The host  
would then have open read and write access of the  
Selecting the software data protection mode requires  
the host system to precede data write operations by a  
series of three write operations to three specific ad-  
dresses. Refer to Figure 6 and 7 for the sequence. The  
three-byte sequence opens the page write window  
enabling the host to write from one to sixty-four bytes of  
data.* Once the page load cycle has been completed,  
the device will automatically be returned to the data  
protected state.  
device once V was stable.  
CC  
*Note: Once the three-byte sequence is issued it  
must be followed by a valid byte or page write  
operation.  
6