X1228
LOW VOLTAGE RESET OPERATION
When the low voltage reset signal is active, the operation
of any in progress nonvolatile write cycle is unaffected,
allowing a nonvolatile write to continue as long as possi-
ble (down to the power on reset voltage). The low voltage
reset signal, when active, terminates in progress commu-
nications to the device and prevents new commands, to
reduce the likelihood of data corruption.
When a power failure occurs, and the voltage to the
part drops below a fixed v
voltage, a reset pulse is
TRIP
issued to the host microcontroller. The circuitry moni-
tors the V line with a voltage comparator which
CC
senses a preset threshold voltage. Power up and
power down waveforms are shown in Figure 4. The
Low Voltage Reset circuit is to be designed so the
RESET signal is valid down to 1.0V.
Figure ±. Watchdog Restart/Time Out
t
t
>t
RSP
RSP WDO
t
t
>t
t
RST
t
<t
RST
RSP WDO
RSP WDO
SCL
SDA
RESET
Stop
Start
Start
Note: All inputs are ignored during the active reset period (t
).
RST
Figure 4. Power On Reset and Low Voltage Reset
V
TRIP
V
CC
t
t
PURST
PURST
t
RPD
t
F
t
R
RESET
V
RVALID
V
THRESHOLD RESET PROCEDURE
Setting the V
Voltage
CC
TRIP
[OPTIONAL]
It is necessary to reset the trip point before setting the
new value.
The X1228 is shipped with a standard V
threshold
CC
(V
) voltage. This value will not change over normal
TRIP
To set the new V
threshold voltage to the V pin and tie the RESET pin
to the programming voltage V . Then write data 00h to
address 01h. The stop bit following a valid write opera-
voltage, apply the desired V
TRIP
TRIP
operating and storage conditions. However, in applica-
tions where the standard V is not exactly right, or if
higher precision is needed in the V
X1228 threshold may be adjusted. The procedure is
described below, and uses the application of a nonvol-
atile write control signal.
CC
TRIP
P
value, the
TRIP
tion initiates the V
programming sequence. Bring
TRIP
RESET to V
to complete the operation. Note: this
CC
operation may take up to 10 milliseconds to complete
and also writes 00h to address 01h of the EEPROM
array.
Characteristics subject to change without notice. 16 of 31
REV 1.3 3/24/04
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