X1202
PIN CONFIGURATION
32.768kHz quartz crystal is used. Recommended crystal
is a Citizen CFS-206. The crystal supplies a timebase for
a clock/oscillator. The internal clock can be driven by an
external signal on X1, with X2 left unconnected.
X1202
8-Pin SOIC
X1
X2
V
V
1
2
8
7
6
5
CC
Figure 1. Recommended Crystal Connection
BACK
RESET
12pF
SCL
SDA
3
4
V
SS
X1
X2
10M
X1202
8-Pin TSSOP
360K
68pF
V
SCL
SDA
BACK
1
2
8
7
6
5
V
CC
V
SS
X1
X2
3
4
POWER CONTROL OPERATION
RESET
The Power control circuit accepts a V
and a V
CC
BACK
BACK
input. The power control circuit will switch to V
when V < V
PIN DESCRIPTIONS
Serial Clock (SCL)
– 0.2V. It will switch back to V
CC
BACK
CC
when V exceeds V
.
CC
BACK
The SCL input is used to clock all data into and out of
the device. The input buffer on this pin is always active
(not gated).
Figure 2. Power Control
V
CC
Internal
Voltage
Serial Data (SDA)
V
BACK
SDA is a bidirectional pin used to transfer data into and
out of the device. It has an open drain output and may
be wire ORed with other open drain or open collector
outputs.The input buffer is always active (not gated).
V
= V
-0.2V
BACK
CC
An open drain output requires the use of a pull-up
resistor. The output circuitry controls the fall time of
the output signal with the use of a slope controlled pull-
down. The circuit is designed for 400kHz 2-wire inter-
face speeds.
REAL TIME CLOCK OPERATION
The Real Time Clock (RTC) uses an external,
32.768kHz quartz crystal to maintain an accurate inter-
nal representation of the year, month, day, date, hour,
minute, and seconds. The RTC has leap-year correc-
tion and century byte. The clock also corrects for
months having fewer than 31 days and has a bit that
controls 24-hour or AM/PM format. When the X1202
V
BACK
This input provides a backup supply voltage to the
device. V supplies power to the device in the
BACK
event the V supply fails.
powers up after the loss of both V
and V
, the
CC
CC
BACK
clock will not increment until at least one byte is written
to the clock register.
RESET Output—RESET
This is a reset signal output. This signal notifies a host
processor that the watchdog time period has expired or
Reading the Real Time Clock
that the supply voltage V
has dropped below a fixed
The RTC is read by initiating a Read command and
specifying the address corresponding to the register of
the real time clock. The RTC Registers can then be
read in a Sequential Read Mode. Since the clock runs
continuously and a read takes a finite amount of time,
there is the possibility that the clock could change dur-
ing the course of a read operation. In this device, the
CC
V
threshold. It is an open drain active LOW output.
TRIP
X1, X2
The X1 and X2 pins are the input and output,
respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator. A
Characteristics subject to change without notice. 2 of 23
REV 1.1.8 5/17/01
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