X1202
DEVICE ADDRESSING
After loading the entire slave address byte from the
SDA bus, the device compares the device identifier and
device select bits with 1101111. Upon a correct compare,
the device outputs an acknowledge on the SDA line.
Following a start condition, the master must output a
slave address byte. The first four bits of the Slave
Address Byte specify access to the CCR. Slave bits
1101 access the CCR.
Following the slave byte is a two byte CCR address.
The CCR address is either supplied by the master
device or obtained from an internal counter.
Bit 3 through Bit 1 of the slave byte specify the device
select bits.These are set to 111.
In a random read operation, the slave byte in the
“dummy write” portion must match the slave byte in the
“read” section. That is, for a random read of the clock/
control registers, the slave byte must be 1101111x in
both places.
The last bit of the slave address byte defines the oper-
ation to be performed. When this R/W bit is a one, then
a read operation is selected. A zero selects a write
operation. Refer to Figure 18.
Figure 17. Slave Address, Word Address, and Data Bytes (64 Byte pages)
Device Identifier
Slave Address Byte
Byte 0
1
1
0
1
1
1
1
R/W
0
High Order Word Address
Byte 1—X1202
0
0
0
0
0
0
0
Low Order Word Address
Byte 2—X1202
A7
D7
A6
D6
A5
D5
A4
D4
A3
D3
A2
D2
A1
D1
A0
D0
Data Byte
Byte 3
Characteristics subject to change without notice. 14 of 23
REV 1.1.8 5/17/01
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