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WM8985 参数 Datasheet PDF下载

WM8985图片预览
型号: WM8985
PDF下载: 下载PDF文件 查看货源
内容描述: 多媒体编解码器, D类耳机和线路输出 [Multimedia CODEC With Class D Headphone and Line Out]
分类和应用: 解码器编解码器
文件页数/大小: 118 页 / 1498 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Pre-Production  
WM8985  
POWER MANAGEMENT  
SAVING POWER BY REDUCING OVERSAMPLING RATE  
The default mode of operation of the ADC and DAC digital filters is in 64x oversampling mode.  
Under the control of ADCOSR128 and DACOSR128 the oversampling rate may be doubled. 64x  
oversampling results in a slight decrease in noise performance compared to 128x but lowers the  
power consumption of the device.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R10 (0Ah)  
3
3
DACOSR128  
0
DAC oversample rate select  
0 = 64x (lowest power)  
1 = 128x (best SNR)  
DAC control  
R14 (0Eh)  
ADCOSR128  
0
ADC oversample rate select  
0 = 64x (lowest power)  
1 = 128x (best SNR)  
ADC control  
Table 48 ADC and DAC Oversampling Rate Selection  
LOW POWER MODE  
If only DAC or ADC functionality is required, the WM8985 can be put into a low power mode. In this  
mode, the DSP core runs at half of the normal rate, reducing digital power consumption of the core  
by half. For DAC low power only, 3D enhancement with 2-Band equaliser functionality is permitted,  
where only Band 1 (low shelf) and Band 5 (high shelf) can be used. For ADC low power, the  
equaliser and 3D cannot be used.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R7 (07h)  
Additional Ctrl  
Table 49 DSP Core Low Power Mode Control  
8
M128ENB  
0
0 = low power mode enabled  
1 = low power mode disabled  
There are 3 modes of low power operation, as detailed below. The device will not enter low power  
unless in one of these register configurations, regardless of M128ENB.  
For pop-free operation of the device it is recommended to change the M128ENB low power  
functionality only when both the DACs and ADCs are disabled, i.e. when DACENL=0, DACENR=0,  
ADCENL=0 and ADCENR=0.  
FUNCTION  
REGISTER BITS  
M128ENB  
ADCENL  
SETTING  
DESCRIPTION  
ADC low power  
0
1
1
0
0
Either or both of ADCENL and  
ADCENR must be set (mono or  
stereo mode)  
ADCENR  
DACENL  
DACENR  
EQ3DMODE  
M128ENB  
ADCENL  
1 (DAC path)  
DAC low power  
0
0
0
1
1
Either or both of DACENL and  
DACENR must be set (mono or  
stereo mode)  
ADCENR  
DACENL  
EQ3DMODE = 0: EQ in ADC path  
EQ3DMODE = 1: EQ in DAC path  
DACENR  
Table 50 DSP Core Low Power Modes for ADC Only and DAC Only Modes  
PP, Rev 3.4, October 2006  
w
87  
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