Pre-Production
WM8985
BIT
LABEL
DEFAULT
DESCRIPTION
REGISTER
ADDRESS
R9 (09h)
5:4
JD_SEL
00
Pin selected as jack detection input
00 = GPIO1
GPIO control
01 = GPIO2
10 = GPIO3
11 = Reserved
6
JD_EN
0
Jack Detection Enable
0 = disabled
1 = enabled
R13 (00h)
3:0
JD_EN0
0000
Output enables when selected jack
detection input is logic 0.
[0]= OUT1_EN_0
[1]= OUT2_EN_0
[2]= OUT3_EN_0
[3]= OUT4_EN_0
7:4
JD_EN1
0000
Output enables when selected jack
detection input is logic 1
[4]= OUT1_EN_1
[5]= OUT2_EN_1
[6]= OUT3_EN_1
[7]= OUT4_EN_1
Table 46 Jack Detect Register Control Bits
CONTROL INTERFACE
SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS
The control interface can operate as either a 3-wire or 2-wire control interface. The MODE pin
determines the 2 or 3 wire mode as shown in Table 47.
The WM8985 is controlled by writing to registers through a serial control interface. A control word
consists of 16 bits. The first 7 bits (B15 to B9) are register address bits that select which control
register is accessed. The remaining 9 bits (B8 to B0) are data bits, corresponding to the 9 data bits
in each control register.
MODE
Low
INTERFACE FORMAT
2 wire
3 wire
High
Table 47 Control Interface Mode Selection
3-WIRE SERIAL CONTROL MODE
In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDIN pin. A rising edge on
CSB/GPIO latches in a complete control word consisting of the last 16 bits.
Figure 38 3-Wire Serial Control Interface
PP, Rev 3.4, October 2006
85
w