WM8983
Product Preview
Test Conditions
DCVDD=1.8V, AVDD1=AVDD2=DBVDD=AVDD2=3.3V, TA = +25oC, 1kHz signal, fs = 48kHz, 24-bit audio data unless
otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Speaker Output (LOUT2, ROUT2 with 8Ω bridge tied load, INVROUT2=1)
Full scale output voltage, 0dB
gain. (Note 9)
SPKBOOST=0
SPKBOOST=1
AVDD2/
3.3
Vrms
(AVDD2/
3.3)*1.5
Output Power
PO
Output power is very closely correlated with THD; see below
Total Harmonic Distortion
THD
PO =200mW, RL = 8Ω,
0.04
-68
1.0
-40
0.02
-74
1.0
-40
90
%
dB
%
AVDD2=3.3V
PO =320mW, RL = 8Ω,
AVDD2=3.3V
dB
%
PO =500mW, RL = 8Ω,
AVDD2=5V
dB
%
P
O =860mW, RL = 8Ω,
AVDD2=5V
dB
dB
Signal to Noise Ratio
SNR
AVDD2=3.3V,
RL = 8Ω
AVDD2=5V,
RL = 8Ω
90
dB
Power Supply Rejection Ratio
(50Hz-22kHz)
PSRR
RL = 8Ω BTL
80
69
dB
dB
RL = 8Ω BTL AVDD2=5V
(boost)
SPKVDD Leakage Current
AVDD2 = 5V
Other supplies disconnected
AVDD2 = 5V
TBD
TBD
uA
Other supplies = 0V
OUT3/OUT4 outputs (with 10kΩ / 50pF load)
Full-scale output voltage, 0dB
gain (Note 9)
OUT3BOOST=0/
OUT4BOOST=0
AVDD2/3.3
Vrms
Vrms
OUT3BOOST=1/
OUT4BOOST=1
A-weighted
1.5 x
AVDD2/3.3
Signal to Noise Ratio (Note 5,6)
Signal to Noise Ratio
Total Harmonic Distortion
(Note 7)
SNR
SNR
THD
98
97.5
-84
dB
dB
dB
22Hz to 22kHz
RL = 10 kΩ
full-scale signal
1kHz signal
Channel Separation (Note 8)
Power Supply Rejection Ratio
(50Hz-22kHz)
80
100
52
dB
dB
dB
PSRR
RL = 10kΩ
RL = 10kΩ, AVDD2=5V
56
Microphone Bias
Bias Voltage
VMICBIAS
MBVSEL=0
MBVSEL=1
0.9*AVDD1
V
V
0.65*AVDD1
Bias Current Source
Output Noise Voltage
Digital Input / Output
Input HIGH Level
IMICBIAS
Vn
for VMICBIAS within +/-3%
1kHz to 20kHz
3
mA
15
nV/√Hz
VIH
0.7×DBV
V
DD
Input LOW Level
VIL
0.3×DBVDD
V
V
Output HIGH Level
VOH
IOL=1mA
IOH-1mA
0.9×DBV
DD
Output LOW Level
Input capacitance
Input leakage
VOL
0.1xDBVDD
V
TBD
TBD
pF
pA
PP Rev 1.1 August 2005
8
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
