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WM8961 参数 Datasheet PDF下载

WM8961图片预览
型号: WM8961
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗立体声编解码器与1W立体声D类扬声器驱动器和接地参考耳机驱动器 [Ultra-Low Power Stereo CODEC with 1W Stereo Class D Speaker Drivers and Ground Referenced Headphone Drivers]
分类和应用: 解码器驱动器编解码器
文件页数/大小: 116 页 / 1413 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8961  
Pre-Production  
DC SERVO FILTER BANDWIDTH  
The DC Servo filter bandwidth can be modified to change the time taken to measure and correct the  
DC offset. The longer the time taken to measure the offset, then the more accurate the correction will  
be.  
REGISTER BIT  
ADDRESS  
LABEL  
DEFAULT  
DESCRIPTION  
Bandwidth of filter during series  
updates. Determines how long a  
measurement takes.  
00 : 6ms  
R63 (3Fh) 5:4  
DC Servo 3  
DCS_FILT_BW_SERIES[1:0]  
01  
01 : 275ms  
10 : 1.2s  
11 : 4.4s  
Table 40 DC Servo Filter Bandwidth Control  
CHARGE PUMP  
The WM8961 incorporates a dual-mode Charge Pump which generates the +ve (VPOS) and –ve  
(VNEG) supply rails for the headphone output driver. The Charge Pump has a single supply input,  
CPVDD, and generates split rails VPOS and VNEG according to the selected mode of operation,  
which means that the headphone driver is capable of driving headphones without the need for large  
AC coupling capacitors. The Charge Pump connections are illustrated in Figure 28 (see ‘applications  
information’ for external component values). An input decoupling capacitor may also be required at  
CPVDD, depending upon the system configuration.  
Figure 28 Charge Pump External Connections  
Three external capacitors are needed for the charge pump. The fly-back pins (CFB1 and CFB2)  
require a 1μF capacitance or greater at 2V. The VPOS and VNEG supply pins each require a 2μF  
capacitance decoupling capacitor at 2V.  
ENABLING THE CHARGE PUMP  
An external clock (MCLK) input is required for the charge pump operation. The minimum MCLK  
frequency for the specified charge pump performance is 2.8224MHz.  
The charge pump is enabled by setting the CP_ENA bit. DVDD and CPVDD must be active before the  
charge pump is enabled. The charge pump initialisation time is specified in the Electrical  
Characteristics. DVDD and CPVDD must be active before the charge pump is enabled.  
REGISTER BIT  
ADDRESS  
LABEL  
DEFAULT  
DESCRIPTION  
Enable charge-pump  
digits  
0: disable  
R72 (48h)  
Charge Pump  
1
0
CP_ENA  
0
1: enable  
Table 41 Charge Pump Enable  
PP, August 2009, Rev 3.1  
w
56  
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