WM8961
Pre-Production
DAC DIGITAL SIDETONE
A digital sidetone from the ADC is available at the DAC. Digital data from either left or right ADC can
be mixed with the audio interface data on the left and right DAC channels. Sidetone data is taken from
the ADC high pass filter output, to reduce low frequency noise which may be present in the sidetone
(e.g. wind noise or mechanical vibration).
When using the digital sidetone, it is recommended that the ADCs are enabled before un-muting the
DACs to prevent pop noise. The DAC volumes and sidetone volumes should be set to an appropriate
level to avoid clipping at the DAC input.
Note that when the ADC sidetone is used for the headphone output, and dynamic (Class W) power
saving is enabled (CP_DYN_PWR[1:0] = 0b11), the charge pump only monitors the DAC input level
rather than the ADC sidetone level. An ADC sidetone signal which is louder than the DAC input signal
could increase headphone output distortion because the charge pump settings are optimised for the
quieter DAC input signal. Hence dynamic (Class W) power saving is not recommended when the ADC
sidetone is louder than the DAC input. See also the ‘Charge pump Clocking’ section.
The digital sidetone is controlled as shown in Table 25.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Controls volume of ADC Right side tone,
R57 (39h)
DSP
7:4
ADCR_DAC_SVOL[3:0]
0000
3dB steps.
0000 : -36dB
0001 : -33dB
…
Sidetone 0
1111 : 0dB
(see Table 26 )
DAC Right Side-tone Control
11 = Unused
10 = Mix ADCR into DACR
01 = Mix ADCL into DACR
00 = No Side-tone mix into DACR
3:2
7:4
ADC_TO_DACR[1:0]
00
Controls volume of ADC Left side tone,
R58 (3Ah)
DSP
ADCL_DAC_SVOL[3:0]
0000
3dB steps.
0000 : -36dB
0001 : -33dB
…
Sidetone 1
1111 : 0dB
(see Table 26 )
3:2
ADC_TO_DACL[1:0]
00
DAC Left Side-tone Control
11 = Unused
10 = Mix ADCR into DACL
01 = Mix ADCL into DACL
00 = No Side-tone mix into DACL
Table 25 Digital Sidetone Control Registers
PP, August 2009, Rev 3.1
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
