WM8961
Pre-Production
REGISTER
ADDRESS
BIT
LABEL
ALCSEL
DEFAULT
DESCRIPTION
ALC Function Select
00 = ALC off (PGA gain set by
register)
R17 (11h)
ALC Control
(1)
8:7
00
(OFF)
[1:0]
01 = Right channel only
10 = Left channel only
11 = Stereo (PGA registers unused)
Note: ensure that LINVOL and
RINVOL settings (reg. 0 and 1)
are the same before entering
this mode.
6:4
3:0
MAXGAIN
[2:0]
111
(+24dB)
Set Maximum Gain of PGA
111 : +24dB
110 : +18dB
….(-6dB steps)
001 : -12dB
000 : -18dB
ALCL
[3:0]
1011
(-12dB)
ALC Target (Sets signal level at ADC
input)
0000 = -28.5dB FS
0001 = -27.0dB FS
… (1.5dB steps)
1110 = -7.5dB FS
1111 = -6dB FS
R18 (12h)
ALC Control
(2)
6:4
MINGAIN
[2:0]
000
Set Minimum Gain of PGA
000 = -23.25dB
001 = -17.25dB
010 = -11.25dB
011 = -5.25dB
100 = +0.75dB
101 = +6.75dB
110 = +12.75dB
111 = +18.75dB
3:0
HLD
[3:0]
0000
(0ms)
ALC hold time before gain is
increased.
0000 = 0ms
0001 = 2.67ms
0010 = 5.33ms
… (time doubles with every step)
1111 = 43.691s
R19 (13h)
ALC Control
(3)
8
ALCMODE
0
Determines the ALC mode of
operation:
0 = ALC mode
1 = Limiter mode
ALCSEL[1:0] bits must be set to 00
before changing this bit.
7:4
DCY
[3:0]
0011
(192ms)
ALC decay (gain ramp-up) time
0000 = 24ms
0001 = 48ms
0010 = 96ms
… (time doubles with every step)
1010 or higher = 24.58s
PP, August 2009, Rev 3.1
w
32
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
