WM8961
Pre-Production
DESCRIPTION
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
R1 (01h)
Right Channel
PGA
8
IPVU
0
Input PGA Volume Update
0 = Store RINVOL in intermediate
latch (no gain change)
1 = Update left and right channel
gains (right = RINVOL, left =
intermediate latch)
7
6
RINMUTE
RIZC
1
0
Right Input PGA Analogue Mute
1 = Enable Mute
0 = Disable Mute
Note: IPVU must be set to un-
mute.
Right Input PGA Zero Cross
Detector. Requires separate
register write before volume
setting.
1 = Change gain on zero cross
only
0 = Change gain immediately
5:0
RINVOL
[5:0]
011111
( 0dB )
Right Input PGA Volume Control
111111 = +24dB
111110 = +23.25dB
. . 0.75dB steps down to
000000 = -23.25dB
R23 (17h)
Additional
control(1)
0
TOEN
0
Timeout Enable
0 = Timeout disabled
1 = Timeout enabled
R30 (1Eh)
Clocking 3
8:7
CLK_TO_DIV[1:0] 00
Timeout/slow clock divider setting
00 : 125Hz ( timeout = 8ms)
01 : 250Hz ( timeout = 4ms)
10 : 500Hz ( timeout = 2ms)
11 : 1kHz ( timeout = 1ms)
Table 6 Input PGA Volume Control
See "Volume Updates" section for a more detailed description of the volume update function, the zero
cross function and the timeout operation
INPUT BOOST STAGE
The output of the PGA volume control stage is fed to the boost stage input. The input boost amplifier
is a second order MFB active filter with selectable step gain. The boost stage provides the capability
of adding large step gains to the output of the PGA. The output of the boost stage feeds into the ADC.
To prevent large step outputs from the ADC, the boost gain should only be set during initial
configuration.
The boost stage can provide up to +29dB additional gain from the PGA output to the ADC input,
providing a total maximum available analogue gain of +53dB from microphone to ADC. Microphone
PGA to boost gain settings are shown in Table 7.
PP, August 2009, Rev 3.1
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
