WM8961
Pre-Production
Figure 7 Typical Power up Sequence when DVDD is Applied before AVDD
Figure 7 shows a typical power-up sequence where DVDD comes up first. First it is assumed that
DVDD is already up to specified operating voltage. When AVDD goes above the minimum threshold,
Vpora, there is enough voltage for the circuit to guarantee PORB is asserted low and the chip is held in
reset. In this condition, all writes to the control interface are ignored. When AVDD rises to Vpora_on
,
PORB is released high and all registers are in their default state and writes to the control interface
may take place.
On power down, where DVDD falls first, PORB is asserted low whenever DVDD drops below the
minimum threshold Vpord_off
.
SYMBOL
Vpora
MIN
TYP
0.5
MAX
UNIT
V
Vpora_on
Vpora_off
Vpord_on
Vpord_off
1.1
V
1.1
V
0.9
V
0.65
V
Table 1 Typical POR Operation
Notes:
1. If AVDD and DVDD suffer a brown-out (i.e. drops below the minimum recommended operating
level but do not go below Vpora_off or Vpord_off) then the chip will not reset and will resume normal
operation when the voltage is back to the recommended level again.
2. The chip will enter reset at power down when AVDD or DVDD falls below Vpora_off or Vpord_off. This
may be important if the supply is turned on and off frequently by a power management system.
3. The minimum tpor period is maintained even if DVDD and AVDD have zero rise time. This
specification is guaranteed by design rather than test.
PP, August 2009, Rev 3.1
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