WM8956
Preliminary Technical Data
ELECTRICAL CHARACTERISTICS
Test Conditions
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25oC, 1kHz signal, fs = 48kHz, PGA gain =
0dB, 24-bit audio data unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3)
Full-scale Input Signal Level –
note this changes in proportion
to AVDD
VINFS
L/RINPUT1,2,3
Single-ended
1.0
0
Vrms
dBV
L/RINPUT1/2 or
L/RINPUT1/3
0.5
-6
Vrms
dBV
Full Differential MIC
L/RINPUT2 or
1.0
0
Vrms
dBV
L/RINPUT3
Pseudo Differential MIC
0 to 20kHz,
Mic PGA equivalent input noise
Input resistance
150
3
uV
+30dB gain
L/RINPUT1
L/RINPUT1
L/RINPUT1
+30dB PGA gain
kΩ
(Note that input boost and
bypass path resistances will be
seen in parallel with PGA input
resistance when these paths are
enabled)
Differential or single-
ended MIC configuration
0dB PGA gain
49
87
85
kΩ
kΩ
kΩ
Differential or single-
ended MIC configuration
-17.25dB PGA gain
Differential or single-
ended MIC configuration
L/RINPUT2,
L/RINPUT3
(Constant for all gains)
Differential MIC
configuration
L/RINPUT2,
L/RINPUT3
L/RINPUT2,
L/RINPUT3
L/RINPUT2,
L/RINPUT3
L/RINPUT3
Max boost gain
L/RINPUT2/3 to boost
0dB boost gain
7.5
13
37
17
70
10
kΩ
kΩ
kΩ
kΩ
kΩ
pF
L/RINPUT2/3 to boost
Min boost gain
L/RINPUT2/3 to boost
Max bypass gain
L/RINPUT2/3 to bypass
Min bypass gain
L/RINPUT3
L/RINPUT2/3 to bypass
Input capacitance
MIC Programmable Gain Amplifier (PGA)
Programmable Gain Min
-17.25
30
dB
dB
dB
dB
Programmable Gain Max
Programmable Gain Step Size
Mute Attenuation
Guaranteed monotonic
LMIC2B = 0 and
RMIC2B = 0
0.75
85
Selectable Input Gain Boost
Gain Boost Steps
Input from PGA
0, 13, 20,
29, MUTE
dB
dB
Input from L/RINPUT2 or
L/RINPUT3
-12, -9, -6, -3
0, 3, 6,
MUTE
PTD, July 2007, Rev 2.1
6
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
