Preliminary Technical Data
WM8956
Test Conditions
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25oC, 1kHz signal, fs = 48kHz, PGA gain =
0dB, 24-bit audio data unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
SPKVDD1=SPKVDD2
=3.3V; AVDD=3.3V;
RL = 8Ω, ref=2.0Vrms
SPKVDD1=SPKVDD2
=5V; AVDD=3.3V;
MIN
TYP
MAX
UNIT
Signal to Noise Ratio
(A-weighted)
SNR
90
dB
(DAC to speaker outputs)
92
90
92
1
dB
dB
dB
uA
RL = 8Ω, ref=2.8Vrms
SPKVDD1=SPKVDD2
=3.3V; AVDD=3.3V;
RL = 8Ω, ref=2.0Vrms
SPKVDD1=SPKVDD2
=5V; AVDD=3.3V;
Signal to Noise Ratio
(A-weighted)
SNR
(LINNPUT3 and RINPUT3 to
speaker outputs)
RL = 8Ω, ref=2.8Vrms
SPKVDD1=SPKVDD2
=5V;
Speaker Supply Leakage current
ISPKVDD
All other supplies
disconnected
SPKVDD1=SPKVDD2
=5V;
1
uA
All other supplies 0V
DAC to speaker playback
Power Supply Rejection Ratio
(100mV ripple on
SPKVDD1/SPKVDD2 @217Hz)
PSRR
80
80
dB
dB
LINPUT3/RINPUT3 to
speaker playback
Analogue Reference Levels
Midrail Reference Voltage
Microphone Bias
VMID
–3%
–5%
–5%
AVDD/2
0.9×AVDD
0.65×AVDD
+3%
+ 5%
+ 5%
3
V
V
V
Bias Voltage
VMICBIAS
3mA load current
MBSEL=1
3mA load current
MBSEL=0
Bias Current Source
Output Noise Voltage
Digital Input / Output
Input HIGH Level
Input LOW Level
IMICBIAS
Vn
mA
1K to 20kHz
15
nV/√Hz
VIH
VIL
0.7×DBVDD
0.9×DBVDD
V
V
0.3×DBVDD
0.1×DBVDD
0.9
Output HIGH Level
Output LOW Level
Input capacitance
Input leakage
VOH
VOL
IOL=1mA
IOH-1mA
V
V
10
pF
uA
-0.9
PTD, July 2007, Rev 2.1
9
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