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WM8945 参数 Datasheet PDF下载

WM8945图片预览
型号: WM8945
PDF下载: 下载PDF文件 查看货源
内容描述: 单声道低功耗编解码器与视频缓冲器和触摸屏控制器 [Mono Low-Power CODEC with Video Buffer and Touch Panel Controller]
分类和应用: 解码器编解码器控制器
文件页数/大小: 169 页 / 1604 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8945  
MICROPHONE BIAS CONTROL  
The WM8945 provides a low noise reference voltage suitable for biasing electret condenser (ECM)  
type microphones via an external resistor. Refer to the “Applications Information” section for  
recommended components. The MICBIAS voltage is enabled using the MICB_ENA register bit; the  
voltage can be selected using the MICB_LVL bit, as described in Table 3.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R2 (02h)  
MICB_ENA  
Microphone Bias Enable  
0 = Disabled  
4
0
Power  
Management 1  
1 = Enabled  
R39 (27h)  
Input Ctrl  
MICB_LVL  
Microphone Bias Voltage control  
0 = 0.9 x LDOVOUT  
1 = 0.65 x LDOVOUT  
6
0
Table 3 Microphone Bias Control  
INPUT PGA GAIN CONTROL  
The volume control gain for the PGA is adjusted using the PGAL_VOL register field as described in  
Table 4. The gain range is -12dB to +35.25dB in 0.75dB steps. The gains on the inverting and non-  
inverting inputs to the PGA are always equal. The input PGA can be muted using the PGAL_MUTE  
mute bit.  
The PGA_VU bit controls the loading of digital volume control data. The PGAL_VOL control data is  
only loaded into the respective control register when PGA_VU = 1.  
To prevent “zipper noise”, a zero-cross function is provided on the input PGA. When this feature is  
enabled, volume updates will not take place until a zero-crossing is detected. In the case of a long  
period without zero-crossings, a timeout function is provided. When the zero-cross function is  
enabled, the volume will update after the timeout period if no earlier zero-cross has occurred. The  
timeout clock is enabled using TOCLK_ENA. See “Clocking and Sample Rates” for the definition of  
this bit. Note that the zero-cross function can be supported without TOCLK enabled, but the timeout  
function will not be provided in this case.  
The Input PGA volume control register fields are described in Table 4.  
REGISTER  
ADDRESS  
BIT  
LABEL  
PGA_VU  
DEFAULT  
DESCRIPTION  
R40 (28h)  
Input PGA Volume Update  
8
0
Left INP PGA  
gain ctrl  
Writing a 1 to this bit enables the  
Left PGA volume to be updated  
PGAL_ZC  
Left Input PGA Zero Cross Detector  
0 = Change gain immediately  
1 = Change gain on zero cross only  
Left Input PGA Mute  
0 = Disable Mute  
7
6
0
1
PGAL_MUTE  
PGAL_VOL [5:0]  
1 = Enable Mute  
Left Input PGA Volume  
00_0000 = -12dB  
5:0  
01_0000  
(0dB)  
00_0001 = -11.25dB  
01_0000 = 0dB  
...  
11_1111 = +35.25  
(See Table 5 for volume range)  
Table 4 Input PGA Volume Control  
PD, May 2011, Rev 4.1  
25  
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