欢迎访问ic37.com |
会员登录 免费注册
发布采购

WM8941GEFL/V 参数 Datasheet PDF下载

WM8941GEFL/V图片预览
型号: WM8941GEFL/V
PDF下载: 下载PDF文件 查看货源
内容描述: 单声道编解码器与扬声器驱动器和视频缓冲器 [Mono CODEC with Speaker Driver and Video Buffer]
分类和应用: 解码器驱动器编解码器
文件页数/大小: 96 页 / 1210 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
 浏览型号WM8941GEFL/V的Datasheet PDF文件第64页浏览型号WM8941GEFL/V的Datasheet PDF文件第65页浏览型号WM8941GEFL/V的Datasheet PDF文件第66页浏览型号WM8941GEFL/V的Datasheet PDF文件第67页浏览型号WM8941GEFL/V的Datasheet PDF文件第69页浏览型号WM8941GEFL/V的Datasheet PDF文件第70页浏览型号WM8941GEFL/V的Datasheet PDF文件第71页浏览型号WM8941GEFL/V的Datasheet PDF文件第72页  
WM8941  
Pre Production  
GENERAL PURPOSE INPUT/OUTPUT  
In 2-wire mode, the CSB pin is not required and it can be used as a GPIO pin. In the WM8941, a  
separate GPIO pin is available and this can be used for GPIO in 3-wire mode. Also in 3 wire mode,  
the MODE / GPIO can be configured as a GPIO by setting the MODE_GPIO register bit  
Whichever pin is used for GPIO, it is controlled from the GPIO control register R8. The GPIOSEL bits  
allow the chosen pin to be configured to perform a variety of useful tasks as shown in Table 53  
Note that SLOWCLKEN must be enabled when using the jack detect function.  
REGISTER  
ADDRESS  
BIT  
5:4  
LABEL  
DEFAULT  
00  
DESCRIPTION  
R8  
OPCLKDIV  
PLL Output clock division ratio  
00=divide by 1  
GPIO  
control  
01=divide by 2  
10=divide by 3  
11=divide by 4  
3
GPIOPOL  
GPIOSEL  
0
GPIO Polarity invert  
0=Non inverted  
1=Inverted  
2:0  
000  
GPIO function select:  
000=GPIO off  
001= Jack insert detect  
010=Temp ok  
011=Amute active  
100=SYSCLK clock o/p  
101=PLL lock  
110=Reserved  
111=Reserved  
Table 53 GPIO Control  
CONTROL INTERFACE  
SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS  
The control interface can operate as either a 3-wire or 2-wire interface. The MODE / GPIO pin  
determines the 2 or 3 wire mode as shown in Table 54.  
The WM8941 is controlled by writing to registers through a serial control interface. A control word  
consists of 24 bits. The first 7 bits (B23 to B16) are address bits that select which control register is  
accessed. The remaining 16 bits (B15 to B0) are register bits, corresponding to the 16 bits in each  
control register.  
MODE / GPIO  
Low  
INTERFACE FORMAT  
2 wire  
3 wire  
3 wire  
Hi-Z  
High  
Table 54 Control Interface Mode Selection  
USE OF MODE AS A GPIO PIN IN 3-WIRE MODE  
In 3-wire mode, MODE can be used as a GPIO pin. If MODE is being used as a GPIO output, the  
partner device doesn’t have to drive MODE - the pin will be pulled-up internally causing 3-wire mode  
will be selected. The GPIO function is enabled by setting the MODE_GPIO register bit. The MODE  
pin can then be controlled using the GPIO register bits as described in Figure 41. To use MODE as  
a GPIO input, MODE must be undriven or driven high at start-up. Specifically MODE must be high or  
hi-Z during an initial write to the control interface which sets the MODE_GPIO register bit. After  
MODE_GPIO has been set, 3-wire mode selection is overridden internally and the MODE pin can be  
used freely as a GPIO input or output.  
PP, Rev 3.3, December 2007  
68  
w
 复制成功!