WM8940
Pre-Production
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Microphone Bias Enable
R1
4
MICBEN
0
Power
management 1
0 = OFF (high impedance output)
1 = ON
Table 9 Microphone Bias Enable
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R44
Input Control
8
MBVSEL
0
Microphone Bias Voltage Control
0 = 0.9 * AVDD
1 = 0.65 * AVDD
Table 10 Microphone Bias Voltage Control
The internal MICBIAS circuitry is shown in Figure 9. Note that the maximum source current
capability for MICBIAS is 3mA. The external biasing resistors therefore must be large enough to limit
the MICBIAS current to 3mA.
MBVSEL=0
MICBIAS
= 1.8 x VMID
= 0.9 X AVDD
VMID
MB
internal
resistor
MBVSEL=1
MICBIAS
= 1.3 x VMID
= 0.65 X AVDD
internal
resistor
AGND
Figure 9 Microphone Bias Schematic
ANALOGUE TO DIGITAL CONVERTER (ADC)
The WM8940 uses a multi-bit, over sampled sigma-delta ADC channel. The use of multi-bit
feedback and high over sampling rates reduces the effects of jitter and high frequency noise. The
ADC Full Scale input level is proportional to AVDD. With a 3.3V supply voltage, the full scale level is
1.0Vrms. Any voltage greater than full scale may overload the ADC and cause distortion.
ADC DIGITAL FILTERS
The ADC filters perform true 24 bit signal processing to convert the raw multi-bit over sampled data
from the ADC to the correct sampling frequency to be output on the digital audio interface. The
digital filter path is illustrated in .
Pre-Production, Rev 3.0, February 2007
22
w