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WM8940GEFL/RV 参数 Datasheet PDF下载

WM8940GEFL/RV图片预览
型号: WM8940GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 单声道编解码器与扬声器驱动器 [Mono CODEC with Speaker Driver]
分类和应用: 解码器驱动器编解码器
文件页数/大小: 85 页 / 819 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Pre-Production  
WM8940  
INPUT PGA VOLUME CONTROL  
The input microphone PGA has a gain range from -12dB to +35.25dB in 0.75dB steps. The gain  
from the MICN input to the PGA output and from the AUX amplifier to the PGA output are always  
common and controlled by the register bits INPPGAVOL[5:0]. These register bits also affect the  
MICP pin when MICP2INPPGA=1.  
When the Automatic Level Control (ALC) is enabled the input PGA gain is then controlled  
automatically and the INPPGAVOL bits should not be used.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R45  
7
6
INPPGAZC  
0
Input PGA zero cross enable:  
Input PGA  
volume  
control  
0=Update gain when gain register changes  
1=Update gain on 1st zero cross after gain  
register write.  
INPPGAMUTE  
INPPGAVOL  
1
Mute control for input PGA:  
0=Input PGA not muted, normal operation  
1=Input PGA muted (and disconnected from  
the following input BOOST stage).  
5:0  
010000  
Input PGA volume  
000000 = -12dB  
000001 = -11.25db  
.
010000 = 0dB  
.
111111 = 35.25dB  
ALC function select:  
R32  
8
ALCSEL  
0
ALC control 1  
0=ALC off (PGA gain set by INPPGAVOL  
register bits)  
1=ALC on (ALC controls PGA gain)  
Table 4 Input PGA Volume Control  
AUXILLIARY INPUT  
An auxiliary input circuit (Figure 7) is provided which consists of an amplifier which can be configured  
either as an inverting buffer for a single input signal or as a mixer/summer for multiple inputs with the  
use of external resistors. The circuit is enabled by the register bit AUXEN.  
Figure 7 Auxiliary Input Circuit  
Pre-Production, Rev 3.0, February 2007  
19  
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