WM8904
Pre-Production
LOW POWER PLAYBACK MODE
The analogue circuits of the WM8904 require a bias current. The default bias configuration is suitable
for typical applications, and does not require any user adjustment.
For lowest power consumption in headphone or line output playback mode, the WM8904 bias settings
must be configured using the register sequence described in Table 48.
Note that the low power playback bias settings are recommended for DAC / Playback modes only;
they are not suitable for ADC / Record Path modes.
REGISTER
ADDRESS
VALUE
04h
08h
CCh
5Bh
63h
64h
A1h
65h
A1h
0011h
0019h
0030h
0002h
2425h
2B23h
0002h
00C0h
0000h
Table 48 Low Power Playback Mode Enable Sequence
The low power mode disable sequence is described in Table 49.
Note that the low power playback bias settings are not suitable for ADC / Record Path modes; the low
power configuration must be disabled for these modes.
REGISTER
ADDRESS
VALUE
04h
08h
CCh
5Bh
63h
64h
A1h
65h
A1h
0019h
0001h
0000h
0000h
1F25h
2B19h
0002h
01C0h
0000h
Table 49 Low Power Playback Mode Disable Sequence
PP, Rev 3.3, September 2012
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