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WM8904CGEFL/V 参数 Datasheet PDF下载

WM8904CGEFL/V图片预览
型号: WM8904CGEFL/V
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗编解码器用于便携式音频应用 [Ultra Low Power CODEC for Portable Audio Applications]
分类和应用: 解码器编解码器电信集成电路便携式PC
文件页数/大小: 188 页 / 1824 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Pre-Production  
WM8904  
REFERENCE VOLTAGES AND MASTER BIAS  
This section describes the analogue reference voltage and bias current controls. Note that, under the  
recommended usage conditions of the WM8904, these features will be configured by scheduling the  
default Start-Up and Shutdown sequences as described in the “Control Write Sequencer” section. In  
these cases, the user does not need to set these register fields directly.  
ANALOGUE REFERENCE AND MASTER BIAS  
The analogue circuits in the WM8904 require a mid-rail analogue reference voltage, VMID. This  
reference is generated from AVDD via a programmable resistor chain.  
VMID is enabled by setting the VMID_ENA register bit. The programmable resistor chain is  
configured by VMID_RES [1:0], and can be used to optimise the reference for normal operation, low  
power standby or for fast start-up as described in Table 47. For normal operation, the VMID_RES  
field should be set to 01.  
The VMID_BUF_ENA bit allows the buffered VMID reference to be connected to unused  
inputs/outputs.  
The analogue circuits in the WM8904 require a bias current. The bias current is enabled by setting  
BIAS_ENA. Note that the bias current source requires VMID to be enabled also.  
The Bias current is controlled using the ISEL register field. Note that the ISEL register should only be  
changed as part of the ‘Low Power Mode Enable’ sequence described in Table 48. In all other cases,  
it is recommended that the ISEL register is not changed from the default setting.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R5 (05h)  
Enable VMID buffer to unused Inputs/Outputs  
0 = Disabled  
6
VMID_BUF_  
ENA  
0
VMID  
Control (0)  
1 = Enabled  
VMID Divider Enable and Select  
00 = VMID disabled (for OFF mode)  
01 = 2 x 50k divider (for normal operation)  
10 = 2 x 250k divider (for low power standby)  
11 = 2 x 5k divider (for fast start-up)  
Enable VMID master bias current source  
0 = Disabled  
2:1  
VMID_RES  
[1:0]  
00  
0
VMID_ENA  
ISEL [1:0]  
0
1 = Enabled  
R4 (04h)  
Master Bias Control  
3:2  
10  
Bias Control  
(0)  
00 = Low power bias  
01 = Reserved  
10 = High performance bias (default)  
11 = Reserved  
Note that the ISEL register should only be  
changed as part of the Low Power Mode  
Enable/Disable sequences.  
Enables the Normal bias current generator  
(for all analogue functions)  
0
BIAS_ENA  
0
0 = Disabled  
1 = Enabled  
Table 47 Reference Voltages and Master Bias Enable  
PP, Rev 3.3, September 2012  
81  
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