WM8850
Pre-Production
VMID Voltage Reference Control
The analogue circuits in the WM8850 require a mid-rail analogue reference voltage, VMID. This
reference is generated from AVDD via a programmable resistor chain. Together with the external
VMID decoupling capacitor, the programmable resistor chain determines the charging rate on VMID.
The resistor chain is selected using VMID_SEL, and can be used to optimise the reference for normal
operation, low power standby or for fast start-up.
The VMID charge rate is controlled by VMID_SEL and the external VMID capacitor. The VMID_RATE
field can be used to control the WM8850 power state according to the appropriate VMID conditions. In
start-up from power state D4, the WM8850 will not indicate the D3 power state until the time set by
VMID_RATE has elapsed.
The VMID_SEL and VMID_RATE fields are part of the VMID Control Verb.
SET VERB
BIT
BITFIELD
NAME
DEFAULT
DESCRIPTION
771h
4:2
VMID_RATE
2h
Time allocated to charge VMID:
0h = 1024ms
1h = 512ms
2h = 256ms
3h = 128ms
4h = 64ms
5h = 32ms
6h = 16ms
7h = 8ms
1:0
VMID_SEL
2h
VMID String Source Impedance Select:
0h = 12.5k
1h = 75
2h = 37.5k
3h = 375k
Note: These figures give the value of the
resistor from AVDD to VMID and from VMID to
GND.
GPIO2 Automatic Control Mode
The GPIO Automatic Control Verb controls the behaviour of the GPIO2 pin.
In a system where external speaker amplifiers are connected to the WM8850 the GPIO2 pin may be
used to control the enable pin(s) of these amplifiers. For this application, it is possible to
automatically configure the GPIO2 pin as an output and to control its logic level as a function of the
AFG power state. This function is enabled by setting GPIO2_AUTO=1 in the vendor-specifc GPIO
Automatic Control Verb:
SET VERB
BIT
BITFIELD
NAME
DEFAULT
DESCRIPTION
786h
0
GPIO2_
AUTO
1
GPIO2 Control Mode:
0 = GPIO2 Manual Mode
1 = GPIO Automatic Control Mode
The behaviour of GPIO2 when GPIO2_AUTO=1 is summarised in Table 33 below. When
GPIO2_AUTO=0 the behaviour of GPIO2 is as per the standard GPIO verbs.
PP, April 2011, Rev 3.2
74
w