Pre-Production
WM8786
AUDIO INTERFACE TIMING – SLAVE MODE, PCM DATA
Figure 3 Digital Audio Data Timing – Slave Mode
Test Conditions
DVDD = 3.3V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK = 256fs, 24-bit data, unless otherwise stated.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCLK cycle time
tBCY 25
ns
LRCLK set-up time to BCLK rising edge
LRCLK hold time from BCLK rising edge
DOUT propagation delay from BCLK falling edge
tLRSU
tLRH
tDD
10
10
0
ns
ns
ns
11
PP Rev 3.0 December 2005
9
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