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WM8786GEDS/RV 参数 Datasheet PDF下载

WM8786GEDS/RV图片预览
型号: WM8786GEDS/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 24位, 192kHz立体声ADC [24-Bit, 192kHz Stereo ADC]
分类和应用:
文件页数/大小: 22 页 / 229 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Pre-Production  
WM8786  
MASTER CLOCK AND AUDIO SAMPLE RATES  
The master clock (MCLK) is used to operate the digital filters and the noise shaping circuits. The  
WM8786 supports a wide range of master clock frequencies, and can generate many commonly  
used audio sample rates directly from the master clock. The following tables show the recommended  
Master clock frequencies for different sample rates.  
In Master Mode, with oversampling ratio = single rate or dual rate, Master clock frequency of 256 is  
supported.  
SAMPLING RATE  
(LRCLK)  
OVERSAMPLING  
RATIO  
MASTER CLOCK FREQUENCY (MHz)  
256fs  
8.192  
32kHz  
44.1kHz  
48kHz  
Single Rate  
Single Rate  
Single Rate  
Dual Rate  
11.2896  
12.288  
24.576  
96kHz  
Table 6 Master Mode: Recommended Master Clock Frequency Selection  
In Master Mode, with oversampling ratio = quad rate, Master clock frequency of 192 is supported.  
SAMPLING RATE  
(LRCLK)  
OVERSAMPLING  
RATIO  
MASTER CLOCK FREQUENCY (MHz)  
128fs  
192kHz  
Quad Rate  
24.576  
Table 7 Master Mode: Recommended Master Clock Frequency Selection  
In Slave Mode, Master clock frequencies of 128fs, 192fs, 256fs, 384fs, 512fs and 768fs are supported..  
The WM8786 automatically detects the audio sample rate, in slave mode.  
SAMPLING RATE  
(LRCLK)  
OVERSAMPLING  
MASTER CLOCK FREQUENCY (MHz)  
RATIO  
128fs  
192fs  
256fs  
384fs  
512fs  
768fs  
32kHz  
44.1kHz  
48kHz  
Single Rate  
Single Rate  
Single Rate  
Dual Rate  
-
-
8.192  
11.2896  
12.288  
24.576  
-
12.288  
16.9344  
18.432  
36.864  
-
16.384  
24.576  
-
-
22.5792  
33.8688  
-
-
24.576  
36.864  
96kHz  
-
-
-
-
-
-
192kHz  
Quad Rate  
24.576  
36.864  
Table 8 Slave Mode: Recommended Master Clock Frequency Selection  
MLCK AND LRCLK PHASE RELATIONSHIP  
The WM8786 does not require a specific phase relationship between MLCK and LRCLK. If the  
relationship between MCLK and LRCLK changes by more than +/-8 BCLKs in a 64 BLCK frame, the  
WM8786 will attempt to re-synchronise During re-synchronisation, data samples may be dropped or  
duplicated.  
PP Rev 3.0 December 2005  
19  
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