Pre-Production
WM8786
DEVICE DESCRIPTION
INTRODUCTION
The WM8786 is a high performance stereo audio ADC designed for demanding recording
applications such as DVD recorders, studio mixers, PVRs, and AV amplifiers. The WM8786 consists
of stereo line level inputs, followed by a sigma-delta modulator and digital filtering.
The WM8786 uses a multi-bit high-order oversampling architecture delivering high SNR operating at
oversampling ratios from 128fs to 32fs according to the sample rate. Sample rates from 8kHz to
192kHz are supported. The WM8786 supports master clock rates from 128fs to 768fs.
The digital filter is a high performance linear phase FIR filter. The digital filters are optimised for each
sample rate. Also included is a high pass filter to remove residual DC offsets from the input signal.
The output from the ADC is available on a configurable digital audio interface. It supports a number
of audio data formats including I2S, Left justified and Right justified or DSP, and can operate in
master or slave modes.
The WM8786 functionality is controlled in hardware via specific pins. It is fully compatible and an
ideal partner for a range of industry standard microprocessors, controllers and DSPs.
The WM8786 can be powered down to reduce system power consumption.
DIGITAL AUDIO INTERFACE
The digital audio interface uses three pins:
•
•
•
DOUT: ADC data output
LRCLK: ADC data alignment clock
BCLK: Bit clock, for synchronisation
The digital audio interface takes the data from the internal ADC digital filters and places it on DOUT
and LRCLK. DOUT is the formatted digital audio data stream output from the ADC digital filters with
left and right channels multiplexed together. LRCLK is an alignment clock that controls whether Left
or Right channel data is present on the DOUT line. DOUT and LRCLK are synchronous with the
BCLK signal with each data bit transition signified by a BCLK high to low transition. DOUT is always
an output. BCLK and LRCLK maybe inputs or outputs depending whether the device is in Master or
Slave mode. (see Master and Slave Mode Operation, below).
Four different audio data formats are supported:
•
•
•
•
Left justified
Right justified
I2S
DSP
They are described in Audio Data Formats, below. Refer to the Electrical Characteristic section for
timing information.
MASTER AND SLAVE MODE OPERATION
The WM8786 can be configured as either a master or slave mode device. As a master device the
WM8786 generates BCLK and LRCLK and thus controls sequencing of the data transfer on DOUT.
In slave mode, the WM8786 responds with data to clocks it receives over the digital audio interface.
The mode can be selected using the MS0 pin. Master and slave modes are illustrated below.
MS0 PIN STATUS
INTERFACE FORMAT
Slave
Low
High
High
Master (@256fs in oversampling ratio = single or dual rate)
Master (@192fs in oversampling ratio = quad rate)
Table 2 Control Interface Mode Selection
PP Rev 3.0 December 2005
15
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
